INTRODUCTION SPECIFICATIONS OPTIONS
REFERENCE DOCUMENTS
LOGIC SYMBOLS AND NOMENCLATURE ARITHMETIC UNIT DESCRIPTION
A Register (Accumulator) B Register (Buffer) P Register (Program) J Register (Counter) I Register (Instruction) Parallel Full Adder
Q Register (Multiplier/Quotient) Memory Address Gates
Automatic Program Interrupt Control Overflow Flip-Flop
Test Flip-Flop
Programming and Maintenance Console Line Frequency Timer
Stall Alarm CONSOLE
INTRODUCTION DESCRIPTION
Register Select - P, I, B, A Console to A, B
CLEAR Register
MANual STEP Operation Program Load
Tape Program Load Ope ration
INT
DESC
CON
I/O Teleprinter Program Load Operation
Card Program Load Operation Bulk Program Load Operation CONSOLE PROCEDURES
COMMANDS
COMMAND FORMATS Full Operand GEN 1 GEN 2 GEN 3 Quasi
CMD
BASIC TIMING OF FULL OPERAND COMMANDS Instruction Sequencing
Sequence Control State 1 INDEXING
RELATIVE ADDRESSING MEMORY WRAP AROUND
COMMAND DESCRIPTION CONVENTIONS ADD -ADD Z TO A
A NA - LOGICAL AND TO A
BRU - BRANCH UNCONDITIONALLY
ADD ANA BRU BTR - BRANCH IF TEST FLIP-FLOP RESET BTR BTS - BRANCH IF TEST FLIP-FLOP SET
DMT - DECREMENT MEMORY AND TEST DVD - DIVIDE
BINARY DIVISION
COMMAND DESCRIPTION Sequence State 1 Sequence State 3 Sequence State 4 Sequence State 5
BTS DMT DVD
ERA - EXCLUSIVE OR TO A GEN 1 COMMANDS
BASIC TIMING
ADO - Add One To Bit K CBK - Change Bit K
CLO - Count Least Significant Ones CLZ - Count Least Significant Zeros CMO - Count Most Significant Ones CMZ - Count Most Significant Zeros CNTO - Count Ones
CNT Z - Count Zeros
ERA GNl
TES - Test Even And Set Bit K TEV - Test Bit K Even
TNM - Test Not Minus One TNZ - Test A Non-Zero TOD - Test Bit K Odd
TOR - Test Odd And Reset Bit K TOS - Test Odd And Set Bit K TSC - Test And Shift Circular TZC - Test Zero And Complement TZE - Test A Zero
GEN 2 INPUT /OUTPUT COMMANDS
CPL - Complement A BASIC TIMING
IBK - Isolate Bit K Internal GEN 2 Commands
LBM - .Load Bit Mask High-Speed External GEN 2 Commands
LDO - Load One Into Bit K Low-Speed External GEN 2 Commands LDZ - Load Zeros Into A ABT - Abort Device D's Operation LMO - Load Minus One Into A ACT - Activate Device D's Interrupt
NEG - Negate IAI - Inhibit Automatic Interrupt
RBK - Reset Bit K IAI
2 - Inhibit Automatic Interrupt REV - Reset Test Flip-Flop If Bit K Is Even IN - Input From Device D
RNZ - Reset Test Flip-Flop If A Is Non-Zero JCB - Jump If Channel Busy ROD - Reset Test Flip-Flop If K Is Odd JDR - Jump If Data Ready RST - Reset The Test Flip-Flop JND - Jump If No Demand
SBK - Set Bit K JNE - Jump If Device D Not In Error
SET - Set Test Flip-Flop JNO - Jump If No Overflow
SEV - Set Test Flip-Flop If Bit K Is Even JNP - Jump If No Parity Error SNZ - Set Test Flip-Flop If A Is Non-Zero JNR - Jump If Device D Not Ready SOD - Set Test Flip-Flop If Bit K Is Odd LMR
1, LMR
2 - Load Mask Register SRA - Shift A Right Arithmetic OPR - Operate
SRC - Shift Right Circular OUT - Output To Device D
SRL - Shift Right Logical PAI - Permit Automatic Interrupt TER - Test Even And Reset Bit K RALM - Reset Programmable Alarm
GN2
ii 4022D-T
RAPG - Reset Adjustable Pulse Generator
THEORY OF OPERATION Device Code Matrix
QUADRITECT MEMORY PROTECTION Protect Status
Quadritect Rules Theory of Operation API WATCHDOG
Non-Interruptable Instruction Sequence IAI2 Error Detection
Permit F/F Reset
ALTERNATE SOURCE TIMER SYSTEMS ALARMS
ADJUST ABLE PULSE GENERATOR
TXH XEC OPT
INTRODUCTION
This section describes the functional operation of the GE-PAC* 4022D Arithmetic Unit which is the compu-tational and control center for the GE-PAC 4010B Process Computer System.
The 4022D Arithmetic Unit performs calculations, a wide range of logical operations,, and sequences and distributes data throughout the computer system. It supplies and receives information to/from the Core Memory,, Automatic Program Interrupt Module,, and Input/Output Peripheral Devices as well as the Pro-cess I/O and Bulk Memory Subsystems.
The Arithmetic Unit addresses sequential programmed commands stored in Core Memory. Each command addressed is transferred from memory to the Arith-metic Unit where the command is executed. Since execution of the command may require the transfer of data to or from one of the other modules of the system,, the Arithmetic Unit becomes the communi-cations hub of the system.
The arithmetic operations performed by the Arith-metic Unit include Add,, Subtract,, Multiply,, and Divide. Addition and Subtraction are performed in 3. 2 microseconds,, while Multiply requires between 8. 9 and 12. 1 microseconds and Divide requires 13. 7 microseconds. Add and Subtract use single length 24-bit numbers. Multiply operates on two 24-bit numbers to produce a double length (46 bits plus (Refer to 68A974933 for definitions)
• Circuit Type
Monolithic Integrated.
• Man/Machine Communication
Programming and Maintenance Console.
• Basic Clock Frequency
Parallel and serial internal; parallel external.
"Regiaterecl Troclemor~ of General Electric Company
• Arithmetic
Digital,, binary, fixed point, and 2 's complement; floating point by subroutine.
• Word Size
24-bits (23 through 00); bit 23 is sign and most significant bit.
• Index Words addition to describing the operation of the 4022D Arithmetic Unit, this section also describes the oper-ation of the following Central Systems Unit options:
4DP4800AS061 - Alternate Source Timer 4DP4800AS071 - System Alarms
4DP4800AS081 - Quadritect Memory Protection/
API Watchdog
4DP4800AS091 - Adjustable Pulse Generator The Central Systems Unit drawing. 4DP4903BSID.
defines the options of the CSU for a particular -system.
REFERENCE DOCUMENTS
Logic:
70Cl80955 - 4022D Arithmetic Unit,
4DP4800AS061 - Alternate Source Timer
4DP4800AS071 - System Alarms 4DP4800AS081 - Quadritect Memory
Protection 4DP4800AS091 - Adjustable Pulse
Generator 70Al20311 - Console Interface Module Logic:
70Cl80899 - I/O Expander
70Cl80954 - Automatic Program Interrupt 70Cl80872 - 4016B Core Memory Multiplexer/
Control 70Cl80909 - I/O Buffer
70Cl80914 - Power Components 70Cl80908 - Bulk Memory Controller 70Cl80023
or - Core Memory 68C972952
Maintenance :
GE-PAC 4010 Computer Maintenance Manual
4022D-T ARITHMETIC UNIT INT-1