The following procedures are provided to assist the operator of the Programming and Maintenance Console.
To use these procedures, the Console must be enabled by the key switch.
Enter Data in A or B Register
1. Place MAN - AUTO toggle switch to MAN.
2. Select desired Register by pressing A or B Register Select switch.
3. Press the CLEAR Reg. switch.
4. Press the Console Bit switches for the. de-sired bit pattern.
Store a Word in Core Memory Location¥
1. Place MAN - AUTO toggle switch to MAN.
2. Press A Register Select switch.
3. Press CLEAR Reg. switch.
4. Press the Console Bit pushbuttons for de-sired bit pattern.
5. Press B Register Select switch. displayed by the indicators.
To Store a Constant in All Core Memory Locations
4022D-T ARITHMETIC UNIT CON-11
l,OMHz CLOCK PROO LOAD-BULK FlLPDE (16, 1
1.
AUTO •I 11111 111111 1111 11 11111 I 111 11 I 11 11 11 11 11111 11 11111 I
Bu~~~~sfer I ~~;~ ~~~
Switch
_J.-/
LPDE = CPLB • ~~
IJ:PDE = i5Pt'f· CptB • ~
LPEN = LPLF• MRLS• LCLK IJ5EN = Initialize
FlLPEN (16, l}, _ _ _ _ _ ___, _ _ _ _ ___,
FlLPLl (16. 1 FlLPL2 (16, 1
GOLSTR ( 1 6 , l > J
L---~---~~---'~
GOLMRQ (16,
0--1
L . . - -_
______.n~ _ _ ___,~~
n
GlSMRQ (22) O --+ Location O 1009---+ Location 1 0 --+Loe ation 2 GOSTOR (19)
~---r
I
LPLl = LPEN• MRLS• LCL.K LPL1 = LPL2
LPL2 = LPLl· MRLS• LCLK
LPLl = MRLS· LC LK LSTR = LPLF· LPEN + LPLl LMRQ = i,.STR• MRLS + MAN
STOR = LSTR
MUDlMRLS
_________
__.n~~~____.n~~~---~G1LAUi (16, 1 LAUl = LPLl
GOBAUl (39)
1---"P~A~U"--~•-=B~
_ _ _ _ __.r--
BAUl = LAUl• LRGE• LBR4GOLTDA (~6. 2) 1----+ PAU5 LTDA = LPDE' MRLS' LPLl· LPL2
GlLRGE (16.l)_J 1/0---+ PAU LRGE = LSTR
GOLMOO (16, 2, Address Location 1 LMOO = LPLl • LPL2
GOLMOl (16, 2) Address Location 2
r
LMOl = LPL2GlLU22,20, 18
25041000--+PAU ~
LU22 = MRLS• LPL2• LPDE
~Pl,2 (16.1)~L---fu_h_i_b_tt_s_A_P_I_L_o_c_a_ti_~_s_2_w_ 8 _a_n_d_a_b_o_v_e_.
_ _ _ _ _ _ _ ---:i _jLAPl,2 = LPLF~A3 = LPLF G1LAP3
GO LS PS
CON-12
(16,l)__J Inhibits API to Location 203 8 (15
•
1)11... ______
sa_v_e_s_P_R_e_gi_· st_e_r_i._e_. _P_he_l_d_t_o_o _ _ _ _ _ _ _ _ _ ---:i _jLsPS = LPLF Store O• s in Location 0 Store 100a in Loca- Store O• s in Location 64 words aretion 1. 2. Set B = 250410009. transferred from bulk memory to core memory and stored in memory beginning at loca-tion O.
Fig. CON. 8 Bulk Program Load, Timing Diagram
ARITHMETIC UNIT 4022D-T
13. Place MAN-AUTO toggle switch to AUTO.
14. The constant will now be stored in each memory location.
15. Place MAN-AUTO switch in MAN.
16. Lower SAVE I switch.
To Hand Load Instructions into Sequential Core Location Y, Y + 1, Y + 2, ... (Y ~ 2).
1. Place MAN-AUTO toggle switch to MAN.
2. Press B Register Select switch.
3. Press CLEAR Reg. switch.
4. Press Console Bit switches for 0710001 (LXK 1, 1) bit pattern.
5. Press STEP switch.
6. Press CLEAR Reg. switch.
7. Press Console Bit switches for 321XXXXX (STA Y-1, 1) where XXXXX
=
Y - 1.8. Press A Register Select switch.
9. Press CLEAR Reg. switch.
10. Press Console Bit switches to bit configura-tion of first instrucconfigura-tion to be stored.
11. Press STEP switch.
12. Place SAVE I switch in save position.
13. For each instruction to be stored:
a. Press CLEAR Reg. switch.
b. Enter instruction in Console Bit Switches.
c. Press STEP switch.
The I Register contains the address of the last location stored.
Manually Display the Contents of Sequential Memory Locations Y, Y + 1, Y + 2, ... · (Y ~ 2).
1. Place MAN-AUTO toggle switch to MAN.
2. Press B Register Select switch.
3. Press CLEAR Reg. switch.
4. Press Console Bit switches for 07100001 (LXK 1, 1) bit pattern.
5. Press STEP switch.
6. Press CLEAR Reg. switch.
7. Press Console Bit switches for OOlXXXXX (LOA Y - 1,, 1) where XXXXX = Y - 1.
8. Press STEP switch.
9. Place SAVE I switch in save position.
10. Press A Register select switch. Contents of selected memory location is displayed by Register Display indicators.
11. Press STEP switch for each sequential loca-tion display. The I Register contains the address of the location being displayed.
To Load a Card or Paper Tape Minimum Loader Using Program Load.
1. Place computer in MANUAL mode.
2. Ready the reader.
a. Paper Tape
Place Minimum Loader tape in the reader so that leader is over the read heads.
b. Card
Place Minimum Loader card, either by itself or followed by files to be loaded,, in the hopper and press the READY button.
3. Raise the API ENBL switch.
4. Lower PROG LOAD CARD or PROG LOAD TAPE switch.
5. Press the B-register select switch.
6. Enter the last digit of the device address in bits 0-2 if other than O.
7. Place computer in AUTO mode. The mini-mum loader is read in.
8. Raise LOAD CARD or LOAD TAPE switch.
Operator Communication with Minimum Loader Upon entry or following the detection of an end-of-file record, the Minimum Loader goes into a DEMAND loop awaiting operator communication.
When used with a reader whose device address differs from that assembled into the Minimum Loader card/
tape (device address assembled is printed on the card/
tape),, the correct address must be entered into Location 3:
4022D-T ARITHMETIC UNIT CON-13
1. Place computer in MANUAL.
Additional program files may be loaded using these same three steps.
Error Conditions and Recovery
1. In the event of a device error detectable by the JDR instruction., the Minimum Loader will hang up in a JDR loop. The I/0 BUFFER
c. Manually branch to beginning of Mini-mum Loader +4 if cards., or beginning of Minimum Loader +6 if tape.
d. Place computer in AUTO.
The Minimum Loader rereads the
relocation constant and continues loading.
2. In the event of a parity error (paper tape only), the relocation constant and continues loading.
Software Bootstrap
NOTE
These Software Bootstrap Pro-cedures may be used to load a
3. Hand load the appropriate software bootstrap program.
Paper Tape Software Bootstrap Location
Card Reader Software Bootstrap Location
4. Push ON button to initialize computer.
5. Branch to Location 7.
a. Enter 14000007 into B-register.
b. Push STEP.
6. Operate Reader
a. Enter 00000021 into A- register (not required for cards).
b.. Enter 2502XXXX into B- register where XXXX is the device address.
7. Place computer in AUTO.
The Card Minimum Loader will be loaded into core locations Y + 1 through Y + 50 (the tape loader is loaded into Locations 8 Y + 1 through 60
8).
8. Manually branch to Location Y + 1.
a. Place computer in MANUAL.
b. Enter BRU Y + 1 into B-register.
c. Place computer in AUTO.
Program control goes to Location Y + 1.
The Minimum Loader will pause in a DEMAND loop waiting operator communi-cation.
4022D-T ARITHMmC UNn CON-15
CONTROL ACTIVE IN MODES
OR MAN. AUTO OR
INDICATOR CONSOLE OFF
API STALL
Comes on when API Watchdog timer times out.
X Extinguished by SPB executed because of trap.
by initialize. or API ENBL switch in lockout position. Inhibits all API' s and disables API Watchdog in the lockout position. Disabling th~
console via the keyswitch enables API and
In AUTO mode. computer sequencing enabled.
Computer runs automatically. In MAN mode computer sequencing occurs each time STEP switch is depressed ••.• For one instruction.
Disabling the console via the keyswitch forces AUTO mode. Refer to Manual Mode Descrip-tion.
Turned on by any of the following alarm conditions:
1. Overtemperature or blower air-flow alarm parity error flip-flop. errors or alarms in the bulk memory system. and errors or alarms in the peripheral and I/O subsystems Thls indicator is lighted when the tempera-ture of the logic power supply. memory power supply. or auxiliary memory power regulator is approaching its upper limit or when the air-flow from any of the blowers in the CSU has declined to a dangerous level. This indica-tion serves only as a warning. if the temper-ature continues to rise to the trip level, DC power will be shutdown.
Comes on during execution of Multiply /Divide or TIM/TOM operation to indicate I Register does not contain last instruction following the execution of these commands. Cleared when next instruction is executed.
Comes on when a parity or timing error occurs in an I/0 subsystem. Cleared by JNE or the Alarm Clear switch.
Table CON. 1 Controls and Indicators
Table CON. 1. (Cont.)
Console Bit Switches
/Indicator MAN
(SWCB0023 -Sh. 127)
Continued on next page.
x
Disables Memory Protect when in lockout position. When in the ENBL position Memory Protect is active, if TMFF is set.
MPLX CH. 1 comes on when an error is de-tected by the bulk memory controller. Turn-ed off· by lnltlallze, CLEAR ALARM, or OUT
Comes on when arithmetic overflow occurs.
Turned off by initialize, JNO or LPR com-mands.
Removes DC power from CSU. Refer to Power Distribution section of this book set.
Applies DC power and Initializes the system.
Initialize clears B, P, I Reg., S2-5• Demand, PAI, all Alarms, and priority interrupt flip-fiops. Initialize sets Sl and enables B Reg.
Select. Refer to the Power Distribution de-scription of the book set.
Indicates the status of the Permit Automatic Interrupt flip-flop (Fl WPMT). When lighted, Fl WPMT is set permitting inhibitable inter-rupts. The light is extinguished when F 1 WPMT is reset inhibiting inhibitable in-terrupts. Fl WPMT is controlled by PAI, IAI, SPB, LPR, and LDP commands.
These switches permit the operator to bring a loader program into core memory from the primary bulk memory, paper tape, or cards with a minimum of manual effort. Refer to Program Load discussion.
Each sy;·itch selects its associated register.
Used in conjunction with the register entry and display switch lights. All Registers may be displayed but only A & B may receive data from the Reg. Entry switches. Activating any one of the Reg. Select Switches disables the others. Refer to Register Select discus-sions.
The Switches are used in conjunction with the Reg. Select Switch to enter data into A or B Register. The lights will display the contents of the register selected (I, P, B, or A) by the Register Select Switch. Refer to Register Select Discussions.
Table CON. 1 Controls and Indicators
40220-T ARITHMETIC UNIT CON-17
Table CON. 1. (Cont.) detected, CLEAR ALARM resets Parity Error FF and ,turns off light. JNP and not within allowable range. Turns off when temperature is within allowable range. If parity error occurs during out of limits time memory sequencing is inhibited;
When in the disable position only the DMD, RCS, and OFF switcpes are active. The in-dicators operate indep~·ndent of the CONSOLE ENBL switch.
Sets Demand Flip-Flop when depressed and released. Demand Flip-Flop is cleared and light turned off by JND or initialize. Refer to JND command description.
Lighted when demand flip-flop (FlCDMN) is set. Demand flip-flop is set by DMD switch and cleared by JND command or initialize.
Used in conjunction with the RCS command be altered during the instruction fetch cycle.
This feature is used primarily to save the OP code and index portion of an instruction so
·that the instruction may be repeated. In the down position I operates normally. CONSOLE ENBL disables the SAVE I function when in the disable position.
Table CON. 1 Controls and Indicators
Table CON. 1. (Cont.)
CONTROL ACTIVE IN MODES
z
~~ ~OR MAN. AUTO OR
~ c3
0 ~INDICATOR CONSOLE OFF ::> i:Q 0 e,,
u
::r:::< u
::r:i ~ ~ ...
tl.l ... 0
::> ~ ~
z
DESCRIPTION114 0 tl.l ...
STEP In the MAN mode, each depression and
re-(SWCSTP - Sh. 126) MAN PB lease causes the computer to execute one instruction. Refer to the Manual Mode description.
s1 - s5 These indicators display the status of the 5
(DRCD18-14 - ALL MODES
x
sequence states of the AU.Sh. 130)
STALL Comes on when Stall Alarm timer times out.
(DRCDOl - Sh. 130) ALL MODES
x
May be cleared by Initialize, or Stall ENBL Held off by the SSA instructionSTALL ENBL When in the disable position, the Stall Alarm
(SWCSTL - Sh. 125) AUTO & MAN T and Watchdog Timer is disabled. CONSOLE ENBL enables Stall Alarm and Watchdog Timer when in the disable position. Refer to the Stall Alarm description.
TRAP MODE Comes on when trapping mode flip-flop is set
(DRCD20 - Sh. 130) ALL MODES
x
by STMF or by a LDP or LPR with bit 19= 1.The trapping mode flip- flop is res et ext in-.:, quishing the indicator following a trap error
or by placing the M /P Enable switch in the lockout position.
TEST Comes on when Test flip-flop is set. The
(DRCD21 - Sh. 130) ALL MODES
x
Test flip-flop can be set by: DMT, TXH.some GEN 1 commands and LPR.
The Test flip-flop may be reset by DMT, TXH. some GEN 1 instructions,, LPR,, and Initialize. Refer to these command descrip-tions.
Table CON. 1 Controls and Indicators
4022D-T ARITHMETIC UNIT CON-19
COMMANDS
The following discussion is provided to assist the reader in a more thorough understanding of the in-dividual command descriptions that follow.