0.00 0.02 0.04 0.06 0.08
0
Fig. 2.8: CV-curves of an NMIS-structure for different frequencies (a). Panel b) shows the measured capacitance as function of capacitor area. Assuming one series and one parallel parasitic capacitance the data can be fitted very well.
Since these quantities are independent of the measured structure, they can be extracted by measuring a series of capacitors with different areas. Fig. 2.8b shows the measured capacitance as a function of area. The data can be fitted very well by assuming both parasitic capacitances. In this case, the extracted values for parallel and series capacitance were 3.2 pF and 55 nF, respectively. The parallel capacitance is relatively high since a switch has been used between LCR-meter and prober. To decrease the influence, the switch can be left out and the length of the cable, after merging the 4-point contacts should be as short as possible. In addition, the parasitic capacitance can be measured directly with non-connected needles using the zero canceloption of the LCR-meter. This value will be subtracted from all subsequent measurements. Most practical, however, is the measurement of capacitances with intermediate areas (10−3 cm2), since then usually all parasitic effects are negligible.
2.2 IV-Measurements on MIS-Structures
Leakage current through an MIS-structure is an essential quantity during the development of transistors and capacitors. From IV-curves it is possible to determine the transport mechanism of charge carriers through the dielectric which yields information on interface traps. Ideally, the dielectric is free of defects so that the leakage current can be described by the well known Fowler-Nordheim formula. In this case it is possible to extract intrinsic properties like parabolic electron mass in the silicon-dioxide conduction band edge or the barrier height between electrode and dielectric. In the following, the two most important transport mechanisms through dielectrics and the most important aspects during the measurement are described.
2.2.1 Carrier Transport through Dielectrics
Dielectrics used in the semiconductor industry almost always have an amorphous struc-ture. Despite the lack of a long-range order, a band diagram is typically used to describe physical effects. The density of states is not zero inside the band gap, but so called mobil-ity edges exist. All states inside these edges are localized, all other states are non-localized and represent conduction and valence band. The density of localized states determines which conduction mechanism dominates.
In case of a negligible density of localized states the carrier transport can be described
by tunneling through a potential barrier. The following formula has been derived initially by Fowler and Nordheim, so that the mechanism is usually referred to as Fowler-Nordheim tunneling [31]:
Here,Eox is the electric field inside the oxide, Φb the barrier height between electrode and dielectric andmox the effective parabolic electron mass in the conduction band edge of the dielectric. This simple formula is valid only for triangular potential barriers, i.e.
only for high gate voltages. A more sophisticated description of the leakage current is presented in Chapter 5 which is valid also for small gate voltages.
So far we assumed that the density of states inside the band gap of the dielectric can be ignored. If this is not the case, charge carriers can pass through the dielectric from one trap to another which is usually referred to as hopping-conduction. According to literature, deposited silicon-nitride has a defect concentration of 1019 cm−3 and shows such a conduction for small fields and low temperatures [85]. For a very small field, an ohmic conduction with a thermal activation energy of qΦt has been observed, where Φt describes the depth of the defect compared to the conduction band edge. The potential near such a defect can be described by a Coulomb-potential which can be reduced by an electric field [7]. The measured current is then given by [106]:
J ∝E·exp Here, E is the electric field and εd the dielectric constant of the insulator. Poole and Frenkel were the first to derive this expression giving the name to the so-called Poole-Frenkel emission [78, 32].
Fig. 2.9: Leakage current of a NMOS structure with 8.5 nm oxide for three different temperatures (a).
Panel b) shows IV-curves of an NO-dielectric for different measurement parameters. All curves have been measured with long integration time and delay times between 0 s and 10 s.
It should be noted that the tunneling current depends on intrinsic properties of the dielectric only and not on the barrier height between electrode and insulator. Therefore, the mechanism is referred to as volume-limited transport. Both conduction mechanisms
2.2. IV-MEASUREMENTS ON MIS-STRUCTURES 17
described here always run in parallel, but depending on material, temperature and electric field usually one of them predominates. Measuring the temperature dependence of the leakage current reveals which transport mechanism can be neglected. Fig. 2.9a shows IV-curves of an MIS-structures with 8.5 nm oxide for three different temperatures. The small influence of temperature indicates Fowler-Nordheim tunneling, which has only a second-order dependence due to change in Fermi-level and in thermal energy kT of the electrons.
2.2.2 Measuring IV-Characteristics
During the measurement of an IV-characteristic, the gate voltage is swept step-wise and the current measured at each point. Starting at a fixed point in time after applying the voltage, the so-called delay time, the current is integrated over a period of up to several seconds. For too short delay times, transient currents can strongly affect the results. Fig.
2.9b shows IV-curves of a standard NO-dielectric for different delay and integration times.
In the range of the operation voltage of -1 V values differ almost one order of magnitude.
Therefore, NO-data presented in this work have been measured with a long integration time and a 5 s delay. Capacitors with an area of 10−3 cm2 are ideal, since they facilitate a good resolution of the current density at small applied bias.
a) 8nm Oxide - NMOS Dark 8nm Oxide - NMOS Light 8nm Oxide - Diffusion-Limited NMOS
b)
Fig. 2.10: Leakage current of an integrated MIS-structure with 8.5 nm oxide measured at a STI-limited capacitor with and without illumination and at a diffusion-limited capacitor (a). Panel b) shows the leakage current of simple planar capacitors with 8.5 nm oxide at different temperatures with and without illumination.
The type of the test structure can have a large impact on the measurement results. Fig.
2.10a shows IV-curves of the same dielectric measured at shallow trench isolation (STI)-limited NMOS-capacitors with or without illumination and at diffusion-(STI)-limited capacitors.
In accumulation, all values are identical so that very simple planar capacitors can be used to study the leakage current in accumulation. In inversion, however, only diffusion-limited capacitors give reliable results. STI-limited capacitors can only generate very few minority carriers for tunneling so that the current stays in the nA-regime also for high voltages.
Illumination generates sufficient minority carriers but has also an influence on the voltage drop across the substrate so that the IV-curve is shifted by approximately 0.5 V. This shift can be seen also by narrowing of measured CV-curves. Fig. 2.10b shows IV-curves of simple planar NMOS-capacitors at different temperatures with and without illumination.
The temperature dependence can be studied in accumulation and gives results similar to fully integrated structures. In inversion, the shift of the IV-curve due to the change in the voltage drop across the substrate can be seen for different temperatures as well as for cases with and without light. As a summary, only diffusion-limited capacitors should be
used to study leakage current of an MIS-structure in inversion. In accumulation, simple planar capacitors give the same values, while STI-limited structures are preferred to study the intrinsic reliability of the dielectric.