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Control Unit End
Sense Information
A Control Unit End status indication is generated at the termination of a previously interrogated Control Unit Busy condition. It may be included with asynchronous interrupts, that is, Attention for the same address. If Control Unit End alone is presented, it may be identified by any address assigned to the control unit.
The sense data consists of either 4 or 24 bytes:
• A 5085 device returns 4 or 24 bytes, depending on the last Set Mode command received.
A 3255-base device or a 5085 when attached to a 3258 returns 4 bytes.
A powered-off device defaults to 3255 base when powered on and the controller performs initial configuration, returning 4 bytes. When a Set Mode command specifying 24 sense bytes is received for a processor, 24 sense bytes are returned until a subsequent power-on, at which time the default to 4 sense bytes is reinstated. The number of sense bytes may also be set back to 4 by issuing the appropriate Set Mode command.
The contents of the sense bytes are defined in Appendix C.
Error portions of the sense data set up by a Unit Check status bit are reset by:
•
The next command to that device address, with the exception of Test 1/0, No-Operation, and Sense ID.
Successful completion of a Sense command .
A machine reset, system reset, selective reset, or power-on.
The display program running bit, character mode, and the display storage address are not reset by the first two cases if these conditions are still valid.
When a Unit Check status has been accepted by the channel, the controller contains the associated sense data in local storage and does not need to interrogate the device for sense data; the Sense command can be handled
immediately by the controller while polling continues to other devices. Therefore, polling may be resumed and any status returned may be presented or queued for the channel.
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Chapter 5. Graphic Orders
Introduction
Order Format
Graphic orders supported by the 5085 Graphics Processor are grouped into four major categories:
1. The base order set of the 5080 Graphics System (see "Base Order Set" on page 5-6), which contains all the graphics system display storage orders required if your system has no special features.
2. Feature orders containing all the display storage orders required to use the Transformation and Clipping Feature [see "Transformation and Clipping Feature (TCP) Orders" on page 5-87].
3. The 3250 compatibility order set containing all the orders not in the base order set that are required to run an existing 3250 display program (see
"3250-Compatible Graphic Orders" on page A-11).
4. The RS232C port order set that contains a subset of graphic orders and several new orders used with the RS232C Attachment Feature (see Chapter 6).
The first word of each order is a set mode (SM) byte, which can have the value X'28', X'2A', X'2C', or X'2E', followed by a mode control (MC) byte, which has a value defining the specific operation required. These orders are defined in detail in later sections of this document. Undefined MC bytes are treated as a 2-Byte No-Operation (GNOP2) order.
Some orders have, following the first word, a second word, or pair of words that extends the MC byte. This extension (if present), called the MC extension, provides increased function control beyond that of the MC byte.
Following the order, which may be one to three words in length (SM, MC, and optional MC extension), can be an optional address word. The address word can contain an absolute or relative address.
Finally, the order may have one or more data words comprising a data list. A data list contains additional parameters required by the order. These parameters may contain immediate data, absolute pointers to data, a branch address, or a
combination of any two or three of these parameter types.
The data list may be immediate to the order or indirect. An immediate data list follows immediately after the order or optional address word, if present. If the data list is indirect, the first and only data word contains an absolute address (within the current page) that points to the location in display storage of the data list.
The unique SM byte contained within every order is provided to enable the processor to detect the beginning of an order and, hence, the potential end of a data list.
The generic order format is as shown below:
Word 1 Word 2/3 Word 3/4 Word 4/5
ByteO Byte 1
Set Mode (SM)
I
Mode Control (MC) MC Extension (Optional)Address (Optional) Data List (Optional) (one or more words)
(can be 2 words)
All the words after word 1 are optional. Whether these words are present or not depends on the order code (MC byte), and, when present, they are always in the order shown.
The SM byte has the following format (in binary):
0010 ladO where the a and d bits are interpreted as follows:
a
=
0 Absolute addressing. The address word contains an absolute address within the current page. Valid values are in the range from 0 to 65,534.a 1 Relative addressing. The address word contains an offset (15 bits + sign, negative numbers are in twos complement) relative to the address of the order (word 1). The effective address is generated by adding the contents of the address word to the address of the order (word 1). A relative address may be in the range from -32,768 to +32,766.
d
=
0 Indirect data. The first (and only) word of the data list contains an absolute address within the current page that points to the location in display storage of the data word or words.d 1 Immediate data. The data is contained in the data word (and successive words, if necessary).
Accordingly, the resultant SM byte values assign the following meanings to the address words and data words, respectively:
X'28' = Absolute addressing and indirect data X2A'
=
Absolute addressing and immediate data X'2C' Relative addressing and indirect data X'2E' Relative addressing and immediate dataIf the order has no address or data words, the a and/ or d bits are ignored.
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