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Modeling application-specific processors for embedded systems

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Modeling Application-Specific Processors for Embedded Systems

Florian Brandner, Viktor Pavlu, and Andreas Krall

COMPSYS, LIP, ENS de Lyon UMR 5668 CNRS – INRIA – UCB Lyon

florian.brandner@ens-lyon.fr

Institute of Computer Languages Vienna University of Technology vpavlu,andi@complang.tuwien.ac.at

Abstract: Embedded systems often have to operate under rigid power and perfor- mance constraints. Off-the-shelf processors often cannot meet those requirements, insteadApplication-Specific Instruction Processors(ASIP) are used that are tuned for the particular system at hand.

A popular and powerful way of modeling ASIPs is the use of aProcessor Descrip- tion Language(PDL). These languages capture the internal hardware organization as well as the processor’s instruction set using a formal specification. Given a proces- sor description, generator tools can (semi-)automatically derive software development tools, instruction set simulators, and even hardware reference models.

An integral part of the software, running on the ASIP, is the interaction with de- vices outside of the computing platform. However, these external devices are ne- glected by many PDLs. This is, in part, due to their diverse nature and complex behav- ior. Explicitly including such devices in processor models, is thus unlikely to give a practical solution.

We propose a basic set of communication patterns for the xADL processor explo- ration system that allow to interact with external devices, while otherwise treating them as black boxes. The xADL system allows to model three kinds of communication: (1) data exchange using dedicated instructions or memory mapped I/O, (2) asynchronous delivery of data directly into processor registers or memory, and (3) asynchronous sig- naling using interrupts. A major advantage of our approach is that all side-effects of these interactions are visible to the xADL tool suite. For example, our compiler gener- ator accounts for side-effects during code generation, while the generated simulators reduce simulation time by refactoring the expensive emulation of interrupts.

1 Introduction

Modern embedded and cyber-physical systems have to perform complex and demanding computations, while, at the same time, consuming a minimal amount of power, restricting heat dissipation, and minimizing the physical dimension of the device. Traditional off- the-shelf processors often cannot meet these strict requirements. A very powerful, but inflexible, alternative is the use of specialized hardware components that are tuned for the particular application. These devices often consume a minimal amount of power, while

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