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Passive Balun › 2 – Transformer

4.2 Balun

4.2.5 Passive Balun › 2 – Transformer

Balun

Design of Circuits

1:1 65 pH 65 pH

500

k = 0.66 10 fF

10 fF

1 1

38 fF 16 fF

IN OUT+

OUT-Figure 4.47: Transformer Core Fitted Lumped Model Schematics

Transformer Core – Fitted Lumped Model An accurate lumped model is preferable to a frequency domain s-parameter set: it contains physical information, is valid in the wider frequency range, filters out EM simulator numerical noise and the representation is more compact. After the transformer core size was fixed, a lumped model was fitted manually to the simulated S-parameter set. A simple narrow-band transformer equivalent circuit topology was assumed [4]. The core is a magnetically coupled 2 identical coils (each with a resistive losses), a capacitive coupling is assumed both between the turns and between each turn and the common mode (ground). Shunt resistive losses are added at the input. The fitting was carried out using a differential 100 Ω output port (Fig. 4.25). The component values obtained from fitting are shown on the schematics (Fig. 4.47). Despite using lumped approximations the fit is very good in a wide bandwidth for input return loss magnitude and phase (Fig. 4.48), insertion loss magnitude and phase (Fig. 4.49) and output differential return loss magnitude (Fig. 4.50). The fit of output differential return loss phase is good, the slight discrepancy (12, worst case) is the toll of deploying a lumped narrow-band approximation – if better fit is desired a distributed model is needed with more degrees of freedom. The analytical calculation of each winding’s inductance using modified Wheeler equation [110] yields 90 pH (as opposed to fitted value of 65 pH). For the calculation of the capacitance between the windings and the substrate Van de Meijs’ and Fokkema’s empirical expression was used [101]. For the primary turn the shunt capacitance of 33 fF was calculated (in line with the fitted value of 38 fF). Same empirical formula yields 14 fF shunt to the ground for each half of the secondary winding.

Transformer Balun Synthesis Flow – System level Approach

As soon as the core of the transformer is fixed, the input- and output- matching networks are added, in a way that:

1Here the MAG concept is extended onto a passive network design, where the MAG inevitably would have a negative sign.

2MAG was measured by probing the 3-Port core S-Parameter file available from EM simulator as suggested in balun measurement setup›2: using a differential output port (Fig. 4.25).

Balun

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2 0

frequency [GHz]

ReflectionLoss[dB]

full EM simulation (CST) fitted

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Reflection[ ]

(b)

Figure 4.48: Transformer Core Even-mode Complex Input Reflection Coefficient

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−18

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InsertionLoss[dB]

full EM simulation (CST) fitted

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Insertion[ ]

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Figure 4.49: Transformer Core Insertion Loss: Input Even-Mode to Output Odd-Mode

ˆ input match (for the single-ended excitation) and output match (for odd-mode excitation) is achieved;

ˆ CMRR is improved (since the parasitics are resonated out) so the transformer is a true balun;

ˆ the insertion loss is minimized and approaches the MAG (with the exception of the losses introduced by the matching networks).

The matched transformer core (Fig. 4.51) is probed as shown in balun measurement setup›2 using a differential output port (Fig. 4.25). The 2-port probing setup allows deployment of small-signal amplifier design techniques for transformer balun synthesis.

Input Matching Circuit The realized input matching network presents the core input with an impedanceZS= 56 +j16 Ω

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Design of Circuits

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frequency [GHz]

ReflectionLoss[dB]

full EM simulation (CST) fitted

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Reflection[]

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Figure 4.50: Transformer Core Odd-mode Complex Output Reflection Coefficient

IN

OUT+

OUT-80 fF

80 fF 80 fF

80 fF

80 fF 250 µm long,

5 µm wide, (86 Ω, 36°)

62 µm long, 9 µm wide, (69 Ω, 9°)

62 µm long, 9 µm wide, (69 Ω, 9°) Transformer Core

Input Match

Output Match

ZS ZL

IN

OUT+

OUT-Figure 4.51: Transformer Balun Detailed Schematics

Output Matching Circuit The realized output matching network presents each core output with an impedance ZL/2 = 25−j24 Ω. The 40 fF shunt capacitor was realized by 2 series 80 fF capacitors in order to lessen impact of process spread.

Realized Transformer

The shorted stub of the input matching network was bended to save space as shown in Fig. 4.52.

In the transformer case same approach is deployed to characterization as in the rat-race case (subsection 4.2.4), so two 2-Port transformer layout configurations were layouted. The EM

Balun

simulations show no performance change if the physical ground is present at the center tap of the secondary tap thanks to symmetry-enforced virtual ground. Nevertheless, to be on the safe side, the center tap of the secondary tap was explicitly grounded.

Figure 4.52: Transformer Layout

Transformer Measurements vs. Simulations

Two simulation approaches were deployed in transformer simulation at different design stages:

ˆ Hybrid simulation approach – synthesis. First EM simulators (CST, Sonnet) were de-ployed to fix the core dimensions and then a circuit simulator (ADS) was used to syn-thesize the matching networks.

ˆ EM simulation approach – validation. The whole transformer balun structure was EM simulated (CST) to validate the overall design and to include couplings and other EM interactions not accounted for by a circuit simulator.

The input return loss for the “Up” and “Down” transformer on Fig. 4.52 are presented on Fig. 4.53 and 4.55. Hybrid simulation using CST yields most accurate results for both “Up”

and “Down” cases, while the input return loss notch is slightly shifted towards higher fre-quencies in hybrid Sonnet case. The notch in the full EM CST simulation case is slightly shifted towards lower frequencies. The discrepancies in input return phase are due to phase

“wrapping” – multiples of 360 are added or subtracted. The input return loss phase is more prone to error for high return loss values. The insertion loss for both transformers’ configu-rations is 4.5 dB (Fig. 4.54 and 4.56). There is no visible spread between 3 samples of each

77

Design of Circuits

Figure 4.53: Xformer-UpEven-mode Complex Input Reflection Coefficient

transformer arrangement. Also in this case the hybrid CST simulation is in best agreement with the measurements, while the worst case discrepancy in the amplitude case is 1.5 dB out-of-band (hybrid Sonnet). In case of insertion loss phase: 10 phase discrepancy correspond to length offset of 50µm which is attributed to the uncertainty in probing needle placement (pad length is 100 µm). The transformer balancing (Fig. 4.57), both amplitude and phase is very

Figure 4.54: Xformer-UpInsertion Loss: Input Even-Mode to Output Odd-Mode broadband. The simulated and measured imbalance agree, while the worst case discrepancy is below 1 dB out-of-band in hybrid Sonnet case. The hybrid Sonnet simulation (considered to be least accurate so far) is the only simulation that predicts 1.7 dB measured imbalance around 23 GHz. For same reasoning applied to rat-race coupler the CMRR and isolation are simulated only (Fig. 4.58). The CMRR curve re-confirms the high and broadband balancing seen already at Fig. 4.57. Since the transformer is a 3 port the isolation is low: circa 7.5 dB at the center frequency. The odd-mode output return loss (Fig. 4.59) was extracted with hybrid measurement approach as shown on Fig. 4.39. There is a good

simulation-Balun

Figure 4.55: Xformer-DownEven-mode Complex Input Reflection Coefficient

Figure 4.56: Xformer-DownInsertion Loss: Input Even-Mode to Output Odd-Mode measurement agreement with worst-case simulation-measurement discrepancy of 2 dB.

Transformer Insertion Loss Contributors Breakdown Several Full CST simulations were run to quantify insertion loss contributors:

ˆ Simulation “as is” yields insertion loss of 4.9 dB.

ˆ Simulation with the metal replaced by perfect electric conductor (PEC) yields insertion loss of 3.8 dB (i.e. no conductor losses included).

ˆ Simulation with open/magnetic boundary yields insertion loss of 3.5 dB (i.e. no substrate losses, since the field doesn’t penetrate into substrate due to the enforced boundary condition).

The simulations’ results are summarized for convenience in table 4.4.

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Design of Circuits

Figure 4.57: Transformer Imbalance

Figure 4.58: Transformer Simulated CMRR and Isolation

Table 4.4: Transformer Balun Insertion Loss Contributions Breakdown – EM Simulation with CST

Contributor [dB]

Ideal Power Division 3 Metal (Conductor) 1.1 Dielectric (Substrate) 0.3 Radiation, other 0.5

Total 4.9

Balun

Figure 4.59: Output Odd-Mode Reflection Extracted from 2 Measured Transformers Transformer Simulation Overview

ˆ Hybrid Sonnet: this is the fastest EM simulation (the recommended Sonnet coarse mesh-ing and fine edge meshmesh-ing settmesh-ing was selected as a reasonable trade-off between accuracy and run-time). In most cases the results using this approach are slightly less accurate relative to the both CST approaches, however the absolute discrepancy is not large (up to 1.5 dB – worst case, out-of-band).

ˆ Hybrid CST: quite accurate results were obtained in this case, while being more resource-demanding simulation than Sonnet (it is a full 3D simulation opposed to 2.5D of Sonnet).

ˆ Full CST: the accuracy is often best in this case, while being by far the most resource-demanding simulation. The full 3D meshing of the whole transformer core with the matching networks seriously increases the numerical complexity of the problem (which at the end penalizes accuracy when limiting run-time bounds).

All of the approaches yield good agreements with measurements. Leveraging the effort between EM and circuit simulators seems optimal: the circuit simulator is most efficient while dealing with PDK models of transmission lines, capacitors, etc., while EM simulation (either of them) lends itself well for such EM problems as transformer core.