man-ner.
4-38.
PRINTER MAGNET CONTROLa. Receive
HCS-220003 Section IV 1. Print and Space Control
The Print and Space Control tells the logic that a print or space operation is taking place. U4-13 will be high be-cause we are in the receive mode and ready to receive information. U4-12 will go high each time we get an Out-put Clock. U4~14 output is fed into U4 (pins 2 & 4) and inverted, because Cycle Trip is now high; U4-2 output is then fed into Print and Space gate, Space Magnet Driver Gate and Cycle Clutch Magnet Driver Gate. U4-2 will normally be low and go high for 12 milliseconds, then it will go back low. U4-7. the other input to Print and Space gate, comes from T4 (pins
The Bail Flip-flop controls the length of the pulse.sent to the Bail Magnets.
T2(pins9,10, & 11) of the Bail because the Filter Shutter has not closed yet. T3-13 will be high because we did not receive the code for a Space. T3-10 will go high when Print and Space set the Bail Flip-flop. This will cause output T3-14 to go low and hold the flip-flop in the set condition even after Print and Space has gone back to normally high state. T2-11 output is NANDED with Print and Space. When Print and Space goes back high U3-5 output goes low.
U3-5 is fed into U3-10 and is inverted.
The output of the inverter U3-11 is NANDED with each of the true out-puts from the Print Register. If T2 from the Print Register is high when U3-11 goes high, the Bail T2 Magnet Driver output will go low and the Bail T2 Magnet will be energized. Approxi-mately 30 to 34 milliseconds after the Bail Flip-flop sets, the Filter Shutter
closes and resets it. When the Bail Flip-flop resets it causes U3-11 to go low. When U3-11 goes low the Bail Magnet Driver gate turns off and the Bail Magnet will de-energize.
3. Operation and Control
Operation and Control is the level that turns the Operations and Controls off and on. U4 (pins 12, 13,
&
14)NANDS Output Clock and Text to-gether to give us a 12 millisecond op-erational magnet pulse. The output of U4 is then fed into T 4-10 and inverted, because Cycle Trip is high. The Opera-tion and Control level comes from 5 gates that are collector
0
RED to-gether. All 5 gates must be high at the same time to get an operation and con-trol function. U4 (pins 12, 13,&
14) and T4 (pins 10&
11) determine the length of the Operation and Control pulse. T4 (pins 2, 3, & 4) and T4 (pins 12 & 14) determine if the code re-ceived is an Operation or Control Code. S3 (pins 6, 7, 9, & 10), S3 (pins 2, 3, 4, & 5} and T4 (pins 5, 6, & 7) are code inhibiting gates. There are 6 operational codes that are not used in the 1030. These gates will cause the logic to ignore those codes. U4 (pins 12, 13, &.14) NANDS Output Clock and Text together to give us a 12 mil-lisecond operational magnet pulse. The output of U3 is then fed into T 4-10 and inverted.4-39. SWITCH PULSE PULSE DELAY a. Transmit
1. Switch Pulse Pulse Delay
The Switch Pulse Pulse Delay network filters out switch bounce and holds Switch Pulse Pulse Delay high for 2 milliseconds after the switch has opened back up. The Switch Pulse Pulse Delay network can be set by either of 2 ways, with Switches input on W5-12 or with the Filter Shutter Switch. A character is printed from the keyboard and the Filter Shutter Switch closes pulling U2-11 and U2-5 low. U2 (pins 11, 12, 13, & 14) filters
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Section IV HCS-220003
25 to 30 milliseconds later the Filter Shutter Switch opens. U2-11 and U2-5 go high. U2-2 will remain high for 2 milliseconds because of the time delay in gate U2 (pins 11, 12, 13, & 14). 2 milliseconds after the Filter Shutter Switch opens U2-14 goes low. U1-10 will then reset the Switch Pulse Pulse Delay latch. For an operation, the in-put that sets the latch is Switches on WS-12. W5 (pins 12 & 14) is an in-verter which feeds U2-12 and U2-4.
The rest of the Switch Pulse Pulse De-lay network functions the same as for a print character. An automatic EOA does not close a switch and the code
The Switch Pulse Pulse Delay network functions the same in receive as in transmit.
4-40. RECEIVE OUTPUT CLOCK CONTROL a. Receive
1. Receive Output Clock Control
Output Clock must be started as soon as the complete character has been re-ceived. J2 is used to set the Receive
Ready Flip-flop. J2-12 will be high be-cause Receive is normally high. J2-11 will be high because Start Time is low for the first 3.71 milliseconds of each character. J2-10 will be high because Cycle goes high at the beginning of each character and remains high for 63.15 milliseconds. J2-13 will go high when the Start Bit reaches the Start Flip-flop. J2-14 will go low setting H4.
H4-7 will be high because we have a carrier established. H4-7 must be high
in order to set and reset the Flip-flop with the J & K inputs. H4-3 Receive
Ready is NANDED with Bail Flip-flop and Receive Cycle to get Clock Start.
Clock Start is the trigger pulse for Output Clock in the receive mode.
P1 -13 is high because H4 has just been set. P1-12 is high because Receive Cycle Flip-flop has not set yet. P1-11 is high because we are not in the print portion of the cycle yet. P1-14 Clock Start goes low and is inverted in F4 to make our Print Register Load Pulse.
F4-14 is fed into F3 to give us a 50 microsecond time delay. The low pulse out of F3 is used to reset H4. When
The Check Gate triggers the Check Flip-flop in case of a parity error detec-tion. L 1 NAN DS Receive Ready, Text and Parity to get the Check Flip-flop trigger pulse.
3. Ready Lamp
The Ready Lamp tells us that we have established a carrier. The la..!!!£_ driver input is connected to CTS LCL which goes low when a carrier is established turning on the Ready Lamp.
4-41. OUTPUT CLOCK a. Transmit
1. Register Reset
The Register Reset pulse resets the Print Register and is the trigger pulse for Output Clock in the transmit mode. Switch Pulse Pulse Delay is NANDED with Keyboard. W1-2 out-put is NANDED with Clock Start.
W1-14 will normally be low and go high with Switch Pulse Pulse Delay in transmit. W1-14 is fed into W1-10 and V1-13. V1-14 will stay high for 10 mi-croseconds after its input goes high.
Output V1-14 is fed into W1-9. This
HCS-220003 Section IV will give us a 10 microsecond pulse
out on W1 -11. W1-11 is Register Re-set.
2. Output Clock
Output Clock gives us a reference from which to start our cycle. V3 (pins 2, S,
&
6) and W1 (pins S, 6,&
7) hold the Output Clock input latch reset. W2-S will normally be setting low. When W1-2 goes low to generate Register Reset, W2-S goes high and W2-4 goes low. This holds W2-2 high and holds W2-14 high. AsRegister Reset is fed into W2-12 the output W2-14 will go high. W2-14 goes back low the Output Clock Single Shot is triggered. V2, an N8162A, must have its output pulse set for 12 to 13 milliseconds. This is done by adjusting R37, a SK poten-tiometer. If W1 (pins S, 6,
&
7) or V3 (pins 2, 5, & 6) do not have a low out-put we will not trigger another Outout-put Clock until they go low.b. Receive
1. Register Reset
Register Reset pulse is generated the same as in transmit except for the originating signal. W1-2 will remain high at all times during the receive mode because Keyboard on W1-4 will be low. Clock Start comes into W1-12 to start out Register Reset gates to functioning.
2. Output Clock
The Output Clock pulse is generated the same as in transmit except for the originating signal. The Clock Start pulse comes in on W2-11 and goes low for 50 microseconds. W2-14 goes high.
At the same time Register Reset goes low, but it has no effect because W2-11 is already low. W2-14 will be high for 50 microseconds per character in re-ceive.
4-42. INTERLOCK a. Transmit
1. Interlock
The Interlock latch is held in the reset condition all the time during the trans-mit mode. W2-6 will remain high.
b. Receive 1. Interlock
The Interlock was designed to tell the logic when the proper operation for a given code is completed. S4 (pins 2, 3, 4, & S), US (pins S, 6, & 7) and US (pins 2, 3, & 4) are used to set the Interlock latch for control functions.
V3-11 (Print
&
Space) set the Inter-lock latch for print and space func-tions. Operations are Interlocked with Switch Pulse Pulse Delay in gate W1 (pins S, 6,&
7). In a print function V3-11 goes low causing V3-14 to go high. When the Filter Shutter Switch closes Switch Pulse Pulse Delay goes low. This will reset the Interlock latch.When the machine is first turned on that the machine will always come up in lower case when it is first turned on.
U1-4 is connected to Power-On-Reset U 1-3 is fed from EOT which is nor- . mally high. U 1-3 will go low when an EOT is transmitted and automatically put the machine in Lower Case each time. When U 1-3 are both high U 1-2 goes low allowing V5, the Up Shift Flip-flop, to be set and reset with the J
&
K inputs. U1-2 is inverted in U1 (pins 13&
14). The high out on U1-14 is fed into W3-7 via a diode to set the shift control JK (W-3).2. Shift Magnet Driver
W3-3 will be high initially because of POR. W4-13 will be high becauseW3-3 is high. W4-11 will be high or low de-pending on the state of the Shift
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