LOGICAL INSTRUCTIONS .1 AND Accumulator (24)

The logical product (AND) of the content of the effective address and the content of the specified accumulator is formed and replaces the content of the accumulator. If A or B is specified as the accumulator, all 32 bits of the word specified by the effective address participate in the operation. If D is specified as the accumulator, all 64-bits of the double-word specified by the effective address participate in the operation.

The following defines the logical AND operation.

m n mANDn

a a a a

¹

a

1

a a

1 1 1

Revised 30 June 1970 4-13

I

operation repertoire

The operation is performed on corresponding bits of the accumulator and memory location.

The M field specifies the accumulator involved in the operation (A, B, or D) and thus determines the size of the operand (word or double-word).

The M field is set as follows:

01 - accumulator A 10 - accumulator B 11 - accumulator D

The C field contains either a zero or one. If C equals zero, no condition indicator is set. If C equals one, the content of the entire specified accumulator is examined and the condition indicator is set as follows:

1 - all bits are one 2 - all bits are zero

3 - neither of the above; the result is mixed zeros and ones

All addressing modes are applicable. In the instance where L equals one, the 18 bits of the address field, prefixed with bits equal to the leftmost bit of the effective address, form the 32-bit or 64-bit operand. The result of the operation replaces the content of the specified accumulator, and the condition code reflects the status of the entire accumulator.

4.3.2 AND Half-Word (30)

The logical product (AND) of the half-word specified by the effective address and the specified half (16 bits) of accumulator A is formed and the result replaces the specified half of accumulator A. The remaining half of accumulator A is undisturbed.

The M field specifies which half of accumulator A is involved in the operation. The M field may also specify to AND the half-word into the right half of accumulator A with the sign bit of the half-word propagated to the left to form a 32-bit operand before the AND operation is performed on the entire A accumulator.

The M field is set as follows:

01 - left half 10 - right half

11 - right half with extended sign

The C field contains either a zero or one. If C equals zero, no condition indicator is set. If C equals one, the content of the entire A accumulator is examined and the condition indicator is set as follows:

1 - all bits are one 2 - all bits are zero

3 - neither of the above; the result is mixed zeros and ones

All addressing modes are applicable. In the instance where L equals one, the rightmost 16 bits of the address field participate in the operation with the specified half of the A accumulator.

4.3.3 AND Byte (20)

The logical product (AND) of the byte specified by the effective address and the specified byte in accumulator A is formed and replaces the specified byte in accumulator A. the remaining bytes of accumulator A are undisturbed.

4-14 Revised 30 June 1970

operation repertoire

The M field specifies the position in accumulator A of the byte involved in the operation.

The M field is set as follows:

00 - byte 1 (leftmost byte) 01- byte 2

10 - byte 3 II-byte 4

The C field contains either a zero or one. If C equals zero, no condition indicator is set. If C equals one, the content of the entire A accumulator is examined and the condition indicator is set as follows:

1 - all bits are one 2 - all bits are zero

3 - neither of the above; the result is mixed zeros and ones

All addressing modes are applicable. In the instance where L equals one, the rightmost 8 bits of the address field participate, as a byte, in the operation.

4.3.4 AND to Storage (64)

The logical product (AND) of the content of the effective address and the content of the accumulator specified is formed and replaces the content of the effective address. The content of the specified accumulator remains undisturbed.

If A or B is specified, all 32 bits of the word specified by the effective address participate in the operation.

If D is specified as the accumulator, all 64 bits of the double-word specified by the effective address participate in the operation.

The M field denotes the accumulator involved in the operation (A, B, or D) and thus determines the size of the operand (word or double-word).

The M field is set as follows:

01- accumulator A 10 - accumulator B 11 - accumulator D

The C field contains either a zero or one. If C equals zero, no condition indicator is set. If C equals one, the content of the specified word or double-word is examined and the condition indicator is set as follows:

1 - all hits are one 2 - all bits are zero

3 - neither of the above; the result is mixed zeros and ones.

The direct and indirect addressing modes are applicable.

4.3.5 Inclusive OR Accumulator (25)

The logical sum (OR) of the content of the effective address and the content of the specified accumulator is formed and replaces the content of the accumulator.

Revised 30 June 1970 4-15

operation repertoire

If A or B is specified as the accumulator, all 32 bits of the word specified by the effective address participate in the operation. If D is specified as the accumulator, all 64 bits of the double-word specified by the effective address participate in the operation.

The following defines the logical OR operation.

m n

o

0

o

1 1 0 1 1

mORn

o

1 1 1

The operation is performed on corresponding bits of the register and the memory location.

The M field specifies the accumulator involved in the operation (A, B, or D) and thus determines the size of the operand (word or double-word).

The M field is set as follows:

01 - accumulator A 10 - accumulator B 11 - accumulator D

The C field contains either a zero or one. If C equals zero, no condition indicator is set. If C equals one, the content of the entire specified accumulator is examined, and the condition indicator is set as follows:

1 - all bits are one 2 - all bits are zero

3 - neither of the above; the result is mixed zeros and ones

All addressing modes are applicable. In the instance where L equals one, the 18 bits of the address field, prefixed with bits equal to the leftmost bit of the address field, form the 32-bit or 64-bit operand. The result of the operation replaces the content of the specified accumulator.

4.3.6 Inclusive OR Half-Word (31)

The logical sum (OR) of the half-word specified by the effective address and the specified half (16 bits) of accumulator A is formed and replaces the specified half of accumulator A. The remaining half of accumulator A is undisturbed.

The M field specifies which half of accumulator A is involved in the operation. The M field may also indicate to OR the half-word into the right half of accumulator A with the sign bit of the half-word propagated to the left to form a 32-bit operand before the OR operation is performed on the entire A accumulator.

The M field is set as follows:

4-16

01 - left half 10 - right half

11 - right half with extended sign

Revised 30 June 1970

operation repertoire

The C field contains either a zero or one. If C equals zero, no condition indicator is set. If C equals one, the content of the entire specified accumulator is examined and the condition indicator is set as follows:

1 - all bits are one 2 - all bits are zero

3 - neither of the above; the result is mixed zeros and ones.

All addressing modes are applicable. In the instance where L equals one, the rightmost 16 bits of the address field participate in the operation with the specified half of accumulator A.

4.3.7 Inclusive OR Byte (21)

The logical sum (OR) of the byte specified by the effective address and the specified byte in accumulator A is formed and replaces the specified byte in accumulator A. The remaining bytes of accumulator A are undisturbed.

The M field specifies the position in accumulator A of the byte involved in the operation. The M field is set as follows:

00 - byte 1 (leftmost byte) 01- byte 2

10 - byte 3 II-byte 4

The C field should contain a zero or one. If C equals zero, no condition indicator is set. If C equals one, the content of the specified accumulator is examined and the condition indicator is set as follows:

1 - all bits are one 2 - all bits are zero

3 - neither of the above; the result is mixed zeros and ones

The entire accumulator is considered to determine the condition indication.

All addressing modes are applicable. In the instance where L equals one, the rightmost 8 bits of the address field participate in the operation.

4.3.8 Inclusive OR to Storage (65)

The logical sum (OR) of the content of the effective address and the content of the specified accumulator is formed and replaces the content of the effective address. The content of the specified accumulator remains undisturbed.

If A or B is specified as the accumulator, all 32 bits of the word specified by the effective address participate in the operation. If D is specified as the accumulator, all 64 bits of the double-word specified by the effective address participate in the operation. The M field specifies the accumulator involved in the operation (A, B, or D) and thus determines the size of the operand (word or double-word).

The M field is set as follows:

01 - accumulator A 10 - accumulator B 11 - accumulator D

Revised 30 June 1970 4-17

operation repertoire

The C field contains either a zero or one. If C equals zero, no condition indicator is set. If C equals one, the content of the specified word or double-word is examined and the condition indicator is set as follows:

1 - all bits are one 2 - all bits are zero

3 -neither of the above; the result is mixed zeros and ones The direct and indirect addressing modes are applicable.

4.3.9 Exclusive OR (EOR) Accumulator (27)

The exclusive OR of the content of the effective address and the content of the specified accumulator is formed and replaces the content of the accumulator.

If A or B is specified as the accu~ulator, all 32 bits of the word specified by the effective address participate in the operation. If D is specified as the accumulator, all 64 bits of the double-word specified by the effective address participate in the operation.

The exclusive OR operation is defined by the following table.

m n

o

0

o

¹

1 0 1 1

mEORn

o

1 1

o

The operation is performed on corresponding bits of the register and the memory location.

The M field specifies the accumulator involved in the operation (A, B, or D) and thus determines the size of the operand (word or double-word).

The M field is set as follows:

01- accumulator A 10 - accumulator B 11 - accumulator D

The C field contains either a zero or one. If C equals zero, no condition indicator is set. If C equals one, the content of the entire specified accumulator is examined and the condition indicator is set as follows:

1 - all bits are one 2 - all bits are zero

3 - neither of the above; the result is mixed zeros and ones

All addressing modes are applicable. In the instance where L equals one, the 18 bits of the address field, prefixed with bits equal to the leftmost bit of the address field, form the 32-bit or 64-bit operand.

4.3.10 Exclusive OR Half-Word (33)

The exclusive OR of the half-word specified by the effective address and of the specified half (16 bits) of accumulator A is formed and replaces the specified half of accumulator A. The remaining half of accumulator A is undisturbed.

4-18 Revised 30 June 1970

operation repertoire

The M field specifies which half of accumulator A is involved in the operation. The M field may also specify to exclusive 0 R the half-word into the right half of accumulator A with the sign bit of the half-word propagated to the left to form a 32-bit operand before the exclusive OR operation, which is then performed on the entire A accumulator.

The M field is set as follows:

01 - left half 10 - right half

11 - right half with extended sign

The C field contains either zero or one. If C equals zero, no condition indicator is set. If C equals one, the content of the entire specified accumulator is examined and the condition indicator is set as follows:

1 - all bits are one 2 - all bits are zero

3 - neither of the above; the result is mixed zeros and ones

All addressing modes are applicable. In the instance where L equals one, the rightmost 16 bits of the address field participate in the operation with the specified half of accumulator A.

4.3.11 Exclusive OR Byte (23)

The exclusive OR of the byte specified by the effective address and the specified byte in accumulator A is formed and replaces the specified byte in accumulator A. The remaining bytes of accumulator A are undisturbed.

The M field specifies the position in accumulator A of the byte involved in the operation.

The M field is set as follows:

00 - byte 1 (leftmost byte) 01- byte 2

10-byte 3 II-byte 4

The C field contains either a zero ·or one. If C equals zero, no condition indicator is set. If C equals one, the content of the entire A accumulator is examined and the condition indicator is set as follows:

1 - all bits are one 2 - all bits are zero

3 - neither of the above; the result is mixed zeros and ones

All addressing modes are applicable. In the instance where L equals one, the rightmost 8 bits of the address field participate in the operation.

4.3.12 Exclusive OR to Storage (65)

The exclusive OR of the content of the effective address and the content of the specified accumulator is formed and replaces the content of the effective address. The content of the specified accumulator remains undisturbed.

Revised 30 June 1970 4-19

operation repertoire

If A or B is specified as the accumulator, all 32 bits of the word specified by the effective address participate in the operation. If D is specified as the accumulator, all 64 bits of the double-word specified by the effective address participate in the operation.

The M field specifies the accumulator involved in the operation (A, B, or D) and thus determines the size of the operand (word or double-word).

The M field is set as follows:

01 - accumulator A 10 - accumulator B 11 - accumulator D

The C field contains either a zero or one. If C equals zero, no condition indicator is set. If C equals one, the content of the specified word or double-word is examined and the condition indicator is set as follows:

1 - all bits are one 2 - all bits are zero

3 - neither of the above; the result is mixed zeros and ones The direct and indirect addressing modes are applicable.

4.3.13 Complement (3B)

The one's complement of the content of the specified accumulator or of the effective address is formed and replaces the original content.

The M field specifies either the accumulator to be complemented (A, B, or D) or a memory word to be complemented.

The M field is set as follows:

00 -memory 01 - accumulator A 10 - accumulator B 11 - accumulator D

The C field contains either a zero or one. If C equals one, the condition indicator is set after the operation to reflect the content of the accumulator specified or memory word as follows:

1 - all bits are ones 2 - all bits are zeros 3 - mixed zeros and ones

If the M field specifies that a memory word is to be complemented, all combinations of values of the I and X fields are permitted. The L field is ignored. If the M field specifies the A, B, or D, the I, X, and address fields are ignored.

4.4 COMPARE INSTRUCTIONS

Im Dokument instruction book (Seite 43-50)