After obtaining the two port S-parameter data from the measurement, it is transformed into two port Z-parameters in Keysights ADS. With the model, the one port complex input impedance of the calibration substrate is calculated according to:
Z= 2(Z11−Z12) +2(Z22−Z21)
2 (3.2)
The same approach is used to characterize the remaining part of the fixture connectors in back-to-back configuration. The obtained raw data sets of the short, open and load calibration substrates from the CST simulation and the measurement with and without de-embedding of the fixture connectors are depicted in figure 3.11.
Overall, the obtained simulated and de-embedded data sets of the implemented custom calibration standard match. For the open and load standard, the de-embedding of the fixture connectors impacts less, compared to the short standard. Here, the fixture connector accounts for 55 % error in the obtained inductance raw data compared to the simulated inductance. For the ESR, the error determined by the fixture connectors is even larger with 89 %. The reason for this, are the spring loaded connectors, which are not optimized for high frequency conduction. To evaluate the impact of erroneous calibration data on a C, Q, ESR measurement, a±1 % parameter variation of the de-embedded calibration dataLshort,Rshort,Lload,Rload,Copen,Ropenis performed and applied to a measurement of a circuit board integrated bulk ceramic varactor module. The detailed equations are given in appendix B.1. The results of the evaluation are depicted in figure 3.12.
At 13.56 MHz the resulting error is less than 1.5 % for the capacitance. For ESR and Q-factor a±1 % variation in calibration data leads to erroneous measurement data smaller than 22 % of the real value. The results show a less significant impact of an erroneous calibration data set on capacitance compared to ESR and Q-factor.
5 10 13.56 15 20 25 20
60 100
Frequency / MHz
Inductance/nH
0 300 600
ESR/mΩ
L measured ESR measured
L de-embedded ESR de-embedded
L simulated ESR simulated
(a)Short.
5 10 13.56 15 20 25
6 6.2 6.4 6.6 6.8 7
Frequency / MHz
Capacitance/pF
0 20 40 60 80 100
ESR/Ω
C measured ESR measured
C de-embedded ESR de-embedded
C simulated ESR simulated
(b)Open.
5 10 13.56 15 20 25
0 25 50 75 100
Frequency / MHz
Inductance/nH
50 50.5 51 51.5 52
ESR/Ω
L measured ESR measured
L de-embedded ESR de-embedded
L simulated ESR simulated
(c)Load.
Figure 3.11:Simulated and raw/de-embedded calibration data for the implemented custom SOL standards.
5 10 13.56 15 20 25 0
0.5 1 1.5 2
Frequency / MHz
Capacitance/nF
Accurate calibration 1 % variation
(a)Evaluation in regard to capacitance.
5 10 15 20 25
0 100 200 300
Frequency / MHz
Q-factor
Acc. cal. 1 % variation
(b)Evaluation in regard to Q-factor.
5 10 15 20 25
0 0.2 0.4 0.6 0.8 1
Frequency / MHz
ESR/Ω
Acc. cal. 1 % variation
(c) Evaluation in regard to ESR.
Figure 3.12: Impact of a±1 % error in compensated calibration data on the capacitance measurement of a circuit board integrated bulk ceramic varactor module.
This is a valid approach, as all electrical components in the L-match circuit are highly linear vacuum varactors and air coils.
Measurement Principle and Setup
The large-signal characterization measurements are carried out in a 50Ωsetup with two L-match circuits in back-to-back configuration and a 10 kW-rated 50Ωload. The L-match circuits provide for a 6 kW power rating, while the RF generator has a maximum output power of 1 kW. The setup monitors the input power from the generator and the output power of the back-to-back matching system to the 50Ωload. The monitoring systems are two Bird Model 4421 RF Power Meter provided by COMET. Due to the high RF power, a voltage or current monitoring system is not installed. The voltages and currents are extracted from an exact model of the L-match circuits. The circuit diagram, including parasitics of the measurement setup with the installed DUT varactor is depicted in figure 3.13, wherePin is a 50Ωpower source providing up to 1 kW of RF power at 13.56 MHz. The tunable load impedanceZ∗Mis adjustable but set to a fixed impedance for the large-signal characterization measurement. A change ofZ∗Mduring the measurement process would alter the loading of every component in the measurement circuit and therefore heavily influence the outcome of the measurement. In general, small values ofZ∗Mresult in increased voltage and current stresses of the components in the measurement circuit, while larger values especially reduce the current stresses. The tunable L-match circuit at the input of the RF power source consists in the shunt branch of a mechanically tunable vacuum varactorCVac1which is in series connection to the DUT thick film varactor. CVac1is mechanically tunable in the range of 150 pF to 1500 pF. The thick film varactor is placed in a fixture similar to the characterization fixture and connected to the L-match circuit using copper stripes. Varactor modules are installed in the circuit without an additional fixture with copper stripes soldered to the RF pads of the module. CVac1is controlled using a phase/mag detector and a steepest decent algorithm. Its capacitance value can be acquired with an accuracy of 0.084 pF. A capacitance change of the DUT due to thermal deviation or voltage tuning is compensated byCVac1
due to the fact that the overall capacitance in the shunt branch may not change in order to maintain the matching requirement with the fixedZ∗M. As a result, the capacitance of the DUT can be extracted from the tuning position ofCVac1and the required overall capacitance in the shunt branch for the matched state. In the series branch of the L-match, a second mechanically tunable vacuum varactorCVac2is installed. The capacitance range ofCVac2is 50 pF to 500 pF. The varactor is controlled in the same way asCVac1. An air core inductance Lwith an ohmic resistance of 0.056 mΩand an inductance of 280 nH is in series connection toCVac2. Parasitics of the circuit include series inductances and resistances in each branch, introduced by the internal copper connections. The output of the measurement L-match is loaded with a parasitic capacitance introduced by the coaxial output port.
The measured values of the components and parasitics of the circuit are given in table 3.1.
L-Match Phase/Mag. & Power Meter
50Ω Pin
50Ω
CVac2 L Rpar
ZM
Tunable load
ZM∗
Power Meter
ZLoad
50Ω 50Ω
CVac1
DUT
Rpar
Lpar
Cpar
Figure 3.13: High-power characterization circuit with parasitics.
Table 3.1: Measured component and parasitics values of the L-Match circuit.
CVac1 CVac2 L Lpar Cpar Rpar
pF pF µH µH pF Ω
150..1500 50..500 0.28 0.02 5 0.05
For parameter extraction, in a first step, a 1-port AC/S-parameter simulation model is setup to the reference measurements. For every power level, the same setup is sufficient as the temperature does not impact the impedance of the circuit. However, the absolute losses of the reference circuit increase linearly with the input power level. The relative losses are 1.6 % of the input power, independent of the input power level. The circuits parasitic elements in the simulation are adjusted in a way, that measured input, output and reflected power match the measured ones. Then, in a second step, the DUT is added to the circuit. Here, for every power level an individual circuit has to be set up, as temperature influences the DUTs capacitance and losses significantly. For this,CVac1andCVac2values are adjusted from the reference values measured without the DUT to the measured values during large-signal characterization with the DUT included. The DUT is set up as a capacitance with a series resistance. First, the DUT capacitance and resistance is adjusted roughly by tuning C and ESR until a matching|S11| ≤ −20dB is achieved. In a second step, C and ESR are fine-tuned until the simulated input, output and reflected power match their corresponding values in the measurement. Typical extracted large-signal characterization parameters of the DUT are capacitance, quality factor, ESR, tunability, temperature, dissipated power as well as voltage and current stresses. The implemented setup with an installed thick film varactor in the shunt branch of the circuit is depicted in figure 3.14.
Figure 3.14: Large-signal characterization setup with a thick film varactor.