The characterization of HELIX128S-2.2 is not yet fully terminated. However, with HELIX128S-2.2 the major problems encountered with HELIX128S-2.0/2.1 – keywords digital circuitry, pipeline readout amplifier offset, reduced radiation hardness, compara-tor crosstalk – have been successfully tackled.
The minor flaws encountered by now – pairwise channel crosstalk, fall time of current buffer close to the 40 MHz limit, non-differential output line, loss of a few triggers due to an unhandled condition in the logic – do not inhibit the use of the chip in the HERA-B experiment.
Important measurements to be redone for HELIX128S-2.2 are linearity, pipeline ho-mogenity, and noise. Especially the latter constitutes a stubborn problem; since it reappears periodically, a low-noise measurement site should be installed making use of professional noise reduction techniques (e. g. [Ott88]).
The silicon vertex detector and the inner tracker detector of HERA-B will be equipped with HELIX128S-2.2 in 1999; inspection of the first 10 wafers delivered by AMS indicates a remarkable yield of well above 50 % [Sex98-2]. Thus, after three years of development, the HELIX-project is drawing to a successful close.
0 10 20 30 40 50 60 70 80
0 5 10 15 20 25 30 35 40 45
Cin[pF]
gain/Mip [mV]
simulated
measured
0 10 20 30 40 50 60 70 80
0 5 10 15 20 25 30 35 40 45
Cin[pF]
peak time [ns]
simulated measured
Figure 9.3: Gain and peak time vs. external input capacitance (simulated/measured);
the measured gain and input impedance are lower than expected from simulation [Sac98].
-15 -10 -5 0 5 10 15
0 2 4 6 8 10 12 14 16
Chip 1 Chip 2 Chip 3
Figure 9.4: Comparator offset variations measured on three IDEFIX test chips with 16 channels each [Gla97]
Figure 9.5: Analog multiplex-signal AnalogOut-AnalogOutDummyof HELIX128S2.2 (40 MHz Rclk); charge signals have been injected into six channels [Tru98].
Figure 9.6: Analog multiplex-signalAnalogOut-AnalogOutDummyof HELIX128S2.2 (40 MHz Rclk); one channel carries a 4 MIP-signal [Tru98].
0 200 400 600 800 1000 1200
-15 -10 -5 0 5 10 15
Qin[MIP] I out[µA]
-80 -60 -40 -20 0 20 40 60 80
-15 -10 -5 0 5 10 15
Qin[MIP]
I out-I fit[µA]
Figure 9.7: Measured linearity of HELIX128S-2 at lowSclk-frequency
0 200 400 600 800 1000 1200
0 2 4 6 8 10 12 14 16 18 20
Cin[pF]
ENC [elec.]
simulated measured
Figure 9.8: Equivalent noise charge (ENC) vs. external input capacitance (simu-lated/measured) of HELIX128S-2.1; the measured slope (best value obtained so far [Sex98-1]) coincides with the slope from simulation and calculation, but the offset indi-cates an additional capacitance at the input.
Appendix A
Laplace-Transformation
It is a substantial drawback of the tranformation (chapt. 5.1.1) that the Fourier-integral does not converge for technically interesting signals like the Heaviside-step func-tion U(t) [Hin96, Hol73, WS93] defined by
U(t) =
( 0 : t <0
1 : t≥0 . (A.1)
However, the Fourier-integral exists for a functionfσ(t) which is created from a function f(t) according to
fσ(t) =e−σtU(t)f(t) (A.2)
for all σ > γ iff(t) belongs to the set (also called signal space)
Sγ ={f|f piecewise continous;|f(t)|< Keγt for all t;K, γ real} . (A.3) In other words, f(t) must be bounded by an exponential function Keγt for some real numbersK, γ.
Thus,σ can be chosen such that the Fourier-Integral offσ(t) F(fσ(t)) =F(e−σtU(t)f(t)) =
Z∞
0
f(t)e−(σ+jω)tdt (A.4)
exists, and one defines the Laplace-tranformation L of f(t) inside the integral’s conver-gence region C
C ={s|s=σ+jω; Re(s) =σ > γ} (A.5) to be
L: Sγ → Sγ∗
L(f(t)) = F(fσ(t)) (A.6)
where Sγ∗ is defined as the image signal space of Sγ according to Sγ∗ =
F|F(s) = Z∞
0
f(t)e−stdt, f ∈Sγ
. (A.7)
181
As in the case of the Fourier-transformation, function f(t) and the Laplace-transform L(f(t)) form a pair
L(f(t)) = F(s) = Z∞
0
f(t)e−stdt
L−1(F(s)) = f(t) = 1 2πj
Z∞
0
F(s)estds (A.8)
where s=σ+jω.
In the following tables some calculation rules and the most common Laplace-transform pairs are given.
f(t) F(s)
αf(t) +βg(t) αF(s) +βG(s) f(t−τ) e−sτF(s) e−atf(t) F(s+a) f(at) 1aF(as)
f˙(t) sF(s)−f(+0) Rt
0f(τ)dτ 1sF(s) Rt
0f(τ)g(t−τ)dτ F(s)G(s)
Table A.1: Calculation rules for the Laplace-transform
f(t) F(s) f(t) F(s)
δ(t) 1 sin(at) s2+aa 2
1 (=U(t)) 1s cos(at) s2+as 2
t s12 eatsin(bt) (p−a)b2+b2
eat p−1a eatcos(bt) (p−sa)−2a+b2
teat (p−1a)2 √1 πt
√1 s tn−1
(n−1)!eat (p−1a)n 2qπt s√1 s
Table A.2: Laplace-transform of the most commonly used functions
It is a good exercise for the reader to remember the location of the poles and zeros of the Laplace-transforms; thus, when analysing a transfer function, the time response can be immediately inferred.
Appendix B
Small Signal Analysis
Analog circuit design [AH87, GT96, San94, San98] relies on analytical understanding of the behaviour of circuits consisting of active and passive devices. In a first step, first-order models must be used to evaluate circuit performance. Ideally, analytical expressions can be derived for the quantities of interest (gain, bandwidth, noise etc.).
In a later step, more detailed models including second-order effects can be used to verify the assumptions made; this step in designing a circuit is called simulation and is achieved by computer programs (e. g. SPICE). These models - although very precise - are not suitable for hand calculations due to their complex nature.
SPICE can use different models for a given physical device. It is the task of the semi-conductor company to provide the device parameters to be inserted into a transistor model (e. g. AMS supports the MOS models 2,6, and 15). Accurate modelling is much more important in analog circuits than in digital ones. In fact, it is one of the major issues of state-of-the-art processes to obtain good models of devices. This is still aggra-vated by shrinking process geometries rendering the extraction of good parameters more complicated.
In this chapter we will present the “simple” first-order models used in the treatment of amplifiers throughout chapter 8. Typically, one uses in hand calculation two dif-ferent models for a given device, the second one (“small signal model”) being a linear approximation of the first one (“large signal model”).
Most active elements of a circuit behave in a nonlinear way (see e. g. the MOS transistor transfer characteristics given below). A model that describes the device behaviour over a wide range of voltage and current conditions is called a large signal model (see e. g.
eq. (B.1)).
The small signal model is obtained by Taylor expansion of the voltages and currents involved in the device w. r. t. each other. Only the coefficients of the linear expansion terms are considered since only first order dependencies are of interest. Usually the dependencies of dimension [Ω] or [1/Ω] are plotted into a schematic as plotted e. g. in fig. B.2. Usually, the (independent) noise sources are added as well.
In the small signal analysis of a circuit all transistors and other nonlinear elements are replaced by their small signal model. Small signal analysis thus predicts the circuit performance only for small excitations. Excitation in this sense refers not only to voltages or currents, but can also include device variations. Typical subjects to be examined by
183
a small signal analysis are gain, input or output resistance, common mode suppression etc. . We denote small signal quantities by lower case letters while large signal quantities are written using capital letters.
The basic rules for the transition from a schematic to a small signal schematic are given below; small signal substitutions and calculations are carried out throughout chapter 8.
1. determination of the operation points of transistors, diodes and other nonlinear elements using large signal models
2. substitution of devices by their small signal models using the parameters at the (large signal) bias condition determined in step 1
3. all fixed sources like power lines or bias currents are set to zero (only changes are of interest)
4. all controlled sources with static control voltage or current are set to zero (see step 3)
5. simplification of network where possible to simplify calculations
By use of Kirchhoff’s laws the small signal schematic can be solved by hand or by the use of symbolic circuit calculation programs [Som95].