Bipolar transistors are famous for their good noise behaviour. This reputation stems from their lower flicker-noise w. r. t. MOS transistors and from the lower serial noise obtainable due to their higher transconductance; in voltage amplifiers with low-ohmic sources parallel noise plays a minor role (cf. eq. (4.10)). In high-ohmic sources and at frequencies above the flicker noise, however, MOS transistors take over.
Since in chapt. 7 we compare the noise behaviour of a charge amplifier with MOS resp.
bipolar input transistor, we want to give a short introduction into the bipolar transistor physics. It shall be remarked that certain bipolar transistors are also available in typical CMOS processes (but they suffer from certain limitations).
B.2.1 Basics
Bipolar transistors have lost their leading role in microelectronic circuits to MOS transis-tors; MOS transistors can provide higher density and allow low-power logic, but bipolar transistors can operate at higher frequencies and provide less noise than MOS transistors at low frequencies.
Fig. B.4 shows a cross section through a vertical bipolar npn transistor [San94]. The collector current in such a transistor flows from the buried layer at the bottom over the base to the emitter in vertical direction. The collector consists of an n+-buried layer which is an n-epitaxial layer of constant doping level, and an n+-contact at the surface.
The base has a very small width (typically 0.5 to 0.8 µm); its doping concentration is medium. The emitter forms the uppermost layer and consists of a heavily doped n+ -layer of several µm width. Thus, the bipolar transistor can be imagined to consist of 2 pn-junctions of reversed polarities in series.
V1
Figure B.5: Bipolar transistor small signal model; top: noise sources at their physical origin; bottom: equivalent input noise generators [CS91]
Electrons in the emitter in the first pn-junction diffuse through the very narrow base region to the base-collector junction. Only few electrons are lost in the base due to recombination. At the base-collector junction the electrons are swept to the collector by the electrical field. This collector current can be controlled by the emitter-base-voltage. Thus, in contrast to the MOS transistor transistor where the drain current Id is dominated by drift due to an electrical field in the channel, the collector current is mainly determined by diffusion.
B.2.2 Large Signal Model
The collector current is given by [San94, p. 98]
Ic=Isexp
k= 1.38·1023J/K, T absolute temperature q=1.6·10−19 C, electron charge
Is=Aejssaturation current Aeemitter area
js saturation current density
B.2.3 Small Signal Model
The hybrid-π small signal model of the bipolar transistor is shown in fig. B.5. Its para-meters are given in table B.2. Differently from the MOS transistor the input impedance of the bipolar transistor is quite low (typical values are rπ ≈n· 10 kΩ). Also differently from the MOS case, the transconductance gm is proportional to the collector current (as compared to the square root behaviour of the MOS transistor). The current gain βAC for typical dotations ≈ 100; as a rule of thumb the value of kT /q is 26mV at room temperature. The output impedance r0 due to the EARLY effect is inversely proportional to the collector current flowing
gm ∂V∂Ic
Table B.2: Small signal model parameters of bipolar transistor (cf. fig. B.5); Iccollector current, Ib base current, rπ small signal base-emitter resistance (without base contact resistance), rb base contact resistance, βAC AC-current amplification, r0 small signal collector resistance, Kf flicker noise coefficient, q electron charge, Ae emitter area; the capacitance values are more complicated and can be looked up e. g. in [San94, p. 120 ff].
The noise sources are due to different physical noise sources. As an ohmic resistance the base resistance rb exhibits thermal noise; rb is given by the sum of the intrinsic and extrinsic base resistances; the first denotes the resistance of the lightly doped base region underneath the emitter, whereas the latter gives the resistance from the base contact to said region. Since the bipolar transistor consists of two pn-junctions, both base current and collector current suffer from shot noise (i2b resp.i2c). 1/f-noise is also present in the bipolar transistor (although the corner frequency lies considerably below the one of the MOS transistor); it is usually modelled as current source in parallel to the base current.
The input noise generators can be determined by analogy to the MOS transistor case and are given by [CS91]
v2s = (i2b +i21/f)rb2+ 4kT(rb+1/2
In these equations, it has been assumed that rπ rb and ω <1/(rb(Cπ+Cµ).
The term 4kT(1/2g
m) in vs2 is due to the collector shot noise i2c; thus i2c appears in both input noise generators; the same holds true for i2b +i21/f and thus correlation effects betweenvs2 andi2p have to be considered. A more thorough consideration ([CS91]) shows that for very low frequencies where the 1/f-noise dominates and for very high frequencies ω > 1/(rb(Cπ+Cµ)) the correlation reaches unity. For medium frequencies following a widely accepted approximation ([CS91]) the correlation will be neglected which results in dramatic simplification of the noise calculation in chapt. 7.2.2.
For frequencies belowωβ eqs. (B.7) simplify to vs2 = 4kT(rb+1/2
gm)∆ν i2p = i2b + i2c
|βAC|2 (B.8)
where we also dropped the noise voltage created at rb and the 1/f base current noise. It has to be stated that the assumption ω < ωβ is not strictly fulfilled in the treatment of chapt. 7.2.2; however, since thei2c-term is much smaller thani2b, the error made is small.
Appendix C
HELIX128S-2.x-Genealogy
C.1 HELIX128S-2
The analog signal path of HELIX128S-2 has been extensively described in chapt. 8.
Being the first chip of a new generation, HELIX128S-2 suffers from a number of errors and limitations; a list of known problems is given in the manual (appendix D). In the following we address the problems arising from the analog part.
HELIX128S-2 suffers from a limitation in dynamic range due to the fact that the offset voltage at the pipline amplifier output is wrong. The reason is (cf. also fig. 8.26) that the charge equilibrium obtained by reading out a pipeline cell has been chosen differently from the reset voltage level Vd. Thus, at every read and reset cycle the voltage on the read-line and – correspondingly – the pipeline amplifier output undergoes large transitions. Since this happens for all channels in parallel, the pipe bias and pipe bias2 lines (fig. 8.31) are pulsed via 129 × the gate-drain capacitances of transistors M3 and M4, respectively. Thus, an additional negative feedback is introduced which inhibits the rise of the amplifier output in the given time window. By attributing more time for both the reset- and the read-cycle (fig. 8.28) this problem can successfully be tackled; this is, however, not a viable solution for the experiment.
The comparator circuit has been found to produce significant crosstalk when operating on Helix128-2; the crosstalk arises from feedback via the power supply lines and via the open-collector discriminator outputs at the chip’s bottom side to the amplifier inputs.