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Analysis and Design of Efficiency-Enhancement

Microwave Power Amplifiers Using the Doherty

Technique

Vorgelegt von M.Sc. Khaled Bathich

aus Aleppo/Syrien

von der Fakult¨at IV - Elektrotechnik und Informatik der Technischen Universit¨at Berlin

zur Erlangung des akademischen Grades Doktor der Ingenieurwissenschaften

Dr.Ing. -genehmigte Dissertation

Promotionsausschuss:

Vorsitzender: Prof. Dr.-Ing. Reinhold Orglmeister Gutachter: Prof. Dr.-Ing. Georg B¨ock

Gutachter: Prof. Dr. sc. techn. Renato Negra

Tag der wissenschaftlichen Aussprache: 12. Juli, 2013

Berlin, 2013 D83

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To my father Abdul Razak, my mother Madiha, my wife Muna and lovely son Waleed, for their love, devotion and prayers.

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Acknowledgements

All praise to our Creator, who gave us the tools to develop and ease our life. I wish to express my sincere gratitude to my Doktorvater Prof. Dr.-Ing. Georg B¨ock who gave me the opportunity to conduct this research work at the Microwave Engineering Lab of Berlin Institute of Technology. His continuous supervision and support during this period was crucial to complete this work.

I would also like to thank Prof. Dr. sc. techn. Renato Negra who accepted to be a second examiner for this Ph.D. thesis as well as Prof. Dr.-Ing. Reinhold Orglmeister being the chairman of the dissertation committee.

I am very grateful to all members and students at the Microwave Engineering Lab for the fruitful discussions and the convenient team work environment which helped me alot during my research work.

Khaled Bathich

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Contents

Dedication iii

Acknowledgements v

List of Figures xi

List of Tables xxi

List of Symbols xxii

List of Abbreviations and Acrynoms xxv

Abstract xxviii

Zusammenfassung xxx

Chapter 1 1

1 Introduction 1

Chapter 2 5

2 Power Amplifiers and Efficiency Enhancement 5

2.1 Active Devices for Power Amplifiers . . . 6 2.1.1 AlGaN/GaN HEMT . . . 6 2.2 Amplifier Classes of Operation . . . 8

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2.2.1 Conventional Amplifiers . . . 9

2.2.2 Current-Mode and Switch-Mode Amplifiers . . . 12

2.3 Efficiency Enhancement in Power Amplifiers . . . 16

2.3.1 Efficiency Enhancement by Load Modulation . . . 17

2.3.2 The Doherty Amplifier . . . 20

2.4 Linearity in Power Amplifiers . . . 28

2.4.1 Nonlinearity Characterization . . . 29

2.4.2 Linearity of the Doherty Amplifier . . . 31

2.4.3 Linearization Techniques . . . 33

Chapter 3 36 3 Design of Narrowband Uneven Doherty Amplifiers 36 3.1 The Uneven Doherty Amplifier . . . 36

3.2 Uneven 8 W Si LDMOS Doherty Amplifier Design . . . 39

3.2.1 Main Amplifier Design . . . 40

3.2.2 Peaking Amplifier Design . . . 41

3.2.3 Output Combining Network Design . . . 43

3.2.4 Uneven Power Divider . . . 44

3.2.5 Amplifier Assembly and Experimental Characterization . . . . 45

3.3 Uneven 85 W GaN HEMT Doherty Amplifier Design . . . 51

Chapter 4 58 4 Frequency Response Analysis and Bandwidth Extension of the Do-herty Amplifier 58 4.1 Bandwidth Limiting Factors in the Doherty Amplifier . . . 59

4.2 Frequency Response Analysis of the Output Combining Network . . . 63

4.2.1 Analysis up to the 6 dB Back-Off Point . . . 64

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4.3 Bandwidth Extension of the Output Combining Network . . . 75

Chapter 5 81 5 Design of Dual-Band and Wideband GaN Doherty Amplifiers 81 5.1 The Unsymmetrical Doherty Amplifier . . . 82

5.2 Design of 16 W Dual-Band Unsymmetrical Doherty Amplifier . . . 83

5.2.1 Output Combining Network . . . 84

5.2.2 Main Amplifier Design . . . 85

5.2.3 Peaking Amplifier Design . . . 88

5.2.4 Input Power Divider and Offset Lines . . . 88

5.2.5 Final Schematic and Experimental Characterization . . . 89

5.3 Design of 20 W Wideband Uneven Doherty Amplifier . . . 94

5.3.1 Main Amplifier Design . . . 94

5.3.2 Peaking Amplifier Design . . . 96

5.3.3 Power Combiner and Divider Networks . . . 97

5.3.4 Experimental Characterization . . . 100

5.4 Design of 20 W Wideband Unsymmetrical Doherty Amplifier . . . 105

5.4.1 Main Amplifier Design . . . 106

5.4.2 Peaking Amplifier Design . . . 107

5.4.3 Experimental Characterization . . . 108

5.5 Design of 20 W Bandwidth Extended Unsymmetrical Doherty Amplifier 113 5.5.1 Main Amplifier Design . . . 116

5.5.2 Peaking Amplifier Design . . . 117

5.5.3 Output Combining Network and Power Divider Designs . . . . 118

5.5.4 Assembly and Optimization of the Wideband Doherty PA . . 120

5.5.5 Experimental Characterization . . . 122

5.6 Design of 80 W Wideband Harmonically-Tuned Unsymmetrical Do-herty Amplifier . . . 128

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5.6.1 Main Amplifier Design . . . 130

5.6.2 Peaking Amplifier Design . . . 136

5.6.3 Assembly and Simulation of the Wideband Doherty Amplifier 137 5.6.4 Experimental Characterization . . . 140

5.7 Design of 200 W Wideband Harmonically-Tuned Doherty Amplifier . 148 5.7.1 Main Amplifier Design . . . 148

5.7.2 Peaking Amplifier Design . . . 149

5.7.3 Assembly and Simulation of the 200 W Doherty PA . . . 150

5.7.4 Experimental Characterization . . . 151

5.8 Design of 80 W Wideband Asymmetrical Doherty Amplifier . . . 157

5.8.1 Frequency Response Analysis of the Asymmetrical Doherty Am-plifier . . . 159

5.8.2 PA Design and Experimental Characterization . . . 164

Chapter 6 169

6 Conclusions and Further Work 169

Appendices 172

A ADS Circuit Schematics of the Narrowband Doherty Amplifiers 172

B ADS Circuit Schematic of the Dual-Band GaN Doherty Amplifier 180

C ADS Circuit Schematics of the 20 W Wideband Doherty Amplifiers184

D ADS Circuit Schematics of the 80 W and 200 W Wideband

Harmonically-Tuned GaN Doherty Amplifiers 194

List of Publications 202

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List of Figures

2.1 Basic AlGaN/GaN HEMT structure . . . 8

2.2 Conventional amplifier classes defined based on . . . 9

2.3 Active device with short-circuited higher order harmonics and . . . . 11

2.4 Efficiency versus the conduction angle . . . 11

2.5 Third harmonic peaking Class-F amplifier . . . 13

2.6 Class-D amplifier . . . 15

2.7 Class-E amplifier . . . 16

2.8 Time-domain waveform of a 3G W-CDMA signal . . . 17

2.9 Illustration of the degraded average efficiency in a single-ended amplifier 18 2.10 A FET in class-B amplifier operation . . . 19

2.11 A schematic illustrating active load-pull principle . . . 21

2.12 Basic schematic of the Doherty amplifier . . . 22

2.13 RF amplitudes of the main and peaking device output voltages . . . . 25

2.14 Active load modulation behavior in the Doherty amplifier . . . 26

2.15 Drain efficiencies of the Doherty amplifier and ideal class-B amplifier 27 2.16 Linear power amplification . . . 28

2.17 Illustration of the 1 dB compression point in power amplifiers . . . . 29

2.18 In-band and out-of-band intermodulation and harmonic distortions . 30 2.19 Large-signal third-order harmonic generation coefficient . . . 31

2.20 Illustration of channel bandwidth and adjacent channels for ACPR . 32 2.21 Predistortion linearizer concept . . . 34

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2.22 Linearization of a 3G single-carrier W-CDMA signal using DPD . . . 35

3.1 Fundamental RF current amplitude of a conventional amplifier . . . . 37

3.2 Load modulation behavior in even and uneven Doherty amplifiers . . 38

3.3 DC transfer characteristic of the 4 W Si LDMOS FET and . . . 41

3.4 Schematics of the input and output matching networks of the main PA 42 3.5 Simulated small-signal S-parameters of the main PA and . . . 42

3.6 Simulated DC current characteristic of the peaking PA and . . . 43

3.7 Output combining network of the Doherty amplifier . . . 44

3.8 Schematic of the designed uneven Wilkinson divider and . . . 45

3.9 Illustration of the effect of the peaking output offset line . . . 46

3.10 Block diagram of the designed Si LDMOS Doherty amplifier . . . 46

3.11 Simulated load modulation behavior of the designed Si LDMOS Do-herty amplifier and . . . 47

3.12 Photo of the fabricated 8 W Si LDMOS Doherty PA structure . . . . 48

3.13 Simulated and measured CW large-signal performance of . . . 48

3.14 Measured IMD3 ratio of the Doherty PA . . . 49

3.15 Measured ACPR levels of the Si LDMOS Doherty PA . . . 50

3.16 Simulated CW large-signal performance of the 30 W GaN HEMT based main PA . . . 52

3.17 Simulated CW large-signal performance of the 30 W GaN HEMT based peaking PA . . . 53

3.18 Output combining network of the GaN HEMT Doherty amplifier . . . 54

3.19 Photo of the fabricated 85 W GaN HEMT Doherty PA . . . 55

3.20 Simulated and measured CW large-signal performance of the 85 W GaN HEMT Doherty amplifier . . . 56

3.21 Measured IMD3 ratio of the GaN HEMT Doherty PA . . . 57

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4.2 Transmission phase responses of wideband 10 W GaN PAs . . . 62 4.3 Simulated fundamental output current characteristics of a wideband

class-C GaN PA . . . 62 4.4 Equivalent circuit diagram of the Doherty amplifier in the low-power

region . . . 65 4.5 Calculated real part of the impedance . . . 67 4.6 Equivalent circuit diagram of the Doherty amplifier in the upper 6 dB

regime . . . 68 4.7 Fundamental voltage amplitude across the main device current source

versus the normalized input voltage . . . 70 4.8 Calculated impedance magnitudes of . . . 73 4.9 Calculated efficiency of the Doherty amplifier versus normalized input

voltage and . . . 73 4.10 Calculated efficiency of the Doherty amplifier versus normalized

fre-quency at 6 dB back-off . . . 74 4.11 Calculated maximum output power and efficiency of the Doherty

am-plifier versus normalized frequency . . . 75 4.12 Calculated load modulation behaviors of . . . 77 4.13 Calculated real part of the impedance . . . 78 4.14 Calculated efficiency of the Doherty amplifier using the proposed

out-put combining network . . . 79 4.15 Calculated efficiency of the Doherty amplifier using the proposed and

conventional output combining networks . . . 80

5.1 Calculated efficiency of the dual-band Doherty amplifier . . . 84 5.2 Calculated 6 dB back-off efficiency of the dual-band Doherty amplifier 85 5.3 Schematic of the dual-band output matching network of the main PA 86 5.4 Schematic of the bias tee and . . . 87 5.5 Simulated CW output power and efficiency of the dual-band class-AB 87

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5.6 Simulated CW output power and efficiency of the dual-band class-C . 88 5.7 Simulated transmission and isolation coefficients of the single-section

3 dB Wilkinson divider . . . 89 5.8 Simulated CW large-signal performance of the dual-band Doherty PA 90 5.9 Photo of the realized dual-band GaN Doherty PA . . . 91 5.10 Measured drain efficiency and power gain of the dual-band Doherty PA 92 5.11 Spectra and ACLR levels measured at . . . 93 5.12 Simulated small-signal gain and output reflection coefficient of the

wideband main PA . . . 95 5.13 Simulated CW large-signal performance of the main PA . . . 96 5.14 Simulated CW large-signal performance of the peaking PA . . . 97 5.15 Simulated transmission and isolation coefficients of the wideband

un-even Wilkinson power divider . . . 98 5.16 Simulated transmission phases of the main and peaking PA paths over

1.6-2.2 GHz . . . 99 5.17 Simulated modulation behavior of the main PA load . . . 99 5.18 Block diagram of the designed wideband uneven Doherty PA . . . 100 5.19 Photo of the designed 20 W wideband uneven Doherty PA structure . 100 5.20 Measured small-signal gain and input reflection coefficient . . . 101 5.21 Simulated and measured CW output power, gain and efficiency of the

wideband uneven Doherty PA . . . 102 5.22 Simulated and measured maximum CW output power and the

cor-responding gain, drain efficiency and PAE of the wideband uneven Doherty PA . . . 103 5.23 Simulated and measured PAE and gain versus CW output power of

the wideband uneven Doherty PA . . . 103 5.24 IMD3 ratio over the design band, measured using . . . 104 5.25 ACPR levels measured using a single-carrier W-CDMA signal . . . . 105

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5.26 Simulated CW output power, gain and efficiency of the main PA . . . 106 5.27 Simulated CW large-signal performance of the peaking PA . . . 107 5.28 Amplitudes of the output fundamental currents of the main and

peak-ing PAs at maximum drive level . . . 108 5.29 Simulated CW large-signal performance of the wideband

unsymmetri-cal Doherty PA . . . 109 5.30 Photo of the designed wideband unsymmetrical Doherty PA structure 109 5.31 Measured small-signal S-parameters of the wideband unsymmetrical

Doherty PA . . . 110 5.32 Measured CW output power and gain characteristics of the wideband

unsymmetrical Doherty PA . . . 111 5.33 Measured drain efficiency versus CW output power of the wideband

unsymmetrical Doherty PA . . . 111 5.34 Measured efficiency and gain characteristics of the unsymmetrical

wide-band Doherty PA at 1.8 GHz . . . 112 5.35 Measured CW output power and the efficiencies of the wideband

un-symmetrical Doherty PA and a reference class-AB PA, at 5-6 dB output back-off . . . 113 5.36 Measured CW output power, efficiency and gain of the wideband

un-symmetrical Doherty PA . . . 114 5.37 Upper two-tone IMD3 ratio of the wideband unsymmetrical Doherty . 115 5.38 ACPR levels measured using a single-carrier W-CDMA signal . . . . 115 5.39 Simulated CW output power, gain and efficiency of the main PA . . . 117 5.40 Simulated CW large-signal performance of the peaking PA . . . 118 5.41 Magnitudes and phases of the output fundamental currents of the main

and peaking PAs . . . 119 5.42 Proposed output combining network of the bandwidth extended

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5.43 Simulated transmission and isolation coefficients of the single-section 120 5.44 Block diagram of the bandwidth extended unsymmetrical Doherty . . 121 5.45 Simulated wideband load modulation behaviors of the main PA and

peaking PA load impedances . . . 122 5.46 Simulated small-signal gain and output reflection coefficient of the

bandwidth extended Doherty PA . . . 123 5.47 Simulated CW large-signal performance of the bandwidth extended

Doherty PA . . . 123 5.48 Photo of the designed bandwidth extended unsymmetrical Doherty . 124 5.49 Measured CW output power versus input power characteristics of the

bandwidth extended Doherty PA . . . 125 5.50 Measured drain efficiency versus CW output power characteristics of

the bandwidth extended Doherty PA . . . 125 5.51 Measured CW output power and efficiencies of the bandwidth extended

Doherty PA . . . 126 5.52 Measured maximum CW output power and the corresponding drain

efficiency of the bandwidth extended unsymmetrical Doherty PA . . . 127 5.53 IMD3 ratio levels of the bandwidth extended Doherty PA, measured

using a two-tone stimulus . . . 127 5.54 Amplitudes of the output fundamental currents of the 35 W main

de-vice and 45 W peaking dede-vice at maximum drive level . . . 130 5.55 Influence of the second harmonic load reflection coefficient phase on

main device efficiency . . . 132 5.56 Influence of the second harmonic load reflection coefficient magnitude

on main device efficiency . . . 132 5.57 Load impedance configuration seen by the main device in the low-power

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5.58 Achieved fundamental and second harmonic load reflection coefficients by the realizable output matching network of the main PA . . . 135 5.59 Simulated CW output power, gain and efficiency of the 35 W main PA

at 3 dB output back-off . . . 135 5.60 Simulated CW output power, gain and efficiency of the 45 W peaking 136 5.61 Simulated output impedance magnitude of the peaking PA . . . 137 5.62 Simulated load impedance modulation of the main device/PA . . . . 138 5.63 Simulated CW large-signal 6 dB back-off performance of the 80 W

wideband harmonically-tuned Doherty PA . . . 139 5.64 Simulated CW large-signal performance of the 80 W wideband Doherty

PA at maximum power operation . . . 139 5.65 Photo of the 80 W wideband harmonically-tuned Doherty PA . . . . 140 5.66 Measured small-signal gain and input reflection coefficient of the 80 W

wideband harmonically-tuned Doherty amplifier . . . 141 5.67 Simulated versus measured CW large-signal performance of the

wide-band harmonically-tuned Doherty PA at 1.8 GHz . . . 141 5.68 Simulated versus measured CW large-signal performance of the

wide-band harmonically-tuned Doherty PA (a) at 2.14 GHz (b) at 2.25 GHz 142 5.69 Measured CW output power versus input power characteristics of the

80 W wideband harmonically-tuned Doherty PA over 1.7-2.25 GHz . 143 5.70 Measured drain efficiency versus CW output power characteristics of

the 80 W wideband harmonically-tuned Doherty PA over 1.7-2.25 GHz 143 5.71 Measured CW output power and efficiency of the 80 W wideband

harmonically-tuned Doherty PA at power saturation as well as at 6 dB back-off operations . . . 144 5.72 Comparison of the measured performances of the 20 W unsymmetrical

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5.73 AM-AM and AM-PM conversion characteristics of the 80 W wideband Doherty PA . . . 145 5.74 Measured average drain efficiency and ACLR levels before and after

DPD linearization, using a single-carrier LTE downlink signal . . . . 146 5.75 Measured drain efficiency and ACLR levels before and after DPD

lin-earization, using a single-carrier W-CDMA downlink signal . . . 147 5.76 Simulated CW output power, gain and efficiency of the 100 W main . 149 5.77 Simulated CW output power, gain and efficiency of the 100 W peaking 150 5.78 Simulated CW large-signal performance of the 200 W wideband . . . 151 5.79 Simulated CW large-signal performance of the 200 W wideband . . . 152 5.80 Photo of the 200 W wideband harmonically-tuned Doherty PA . . . . 152 5.81 Simulated and measured CW large-signal performance of the 200 W . 153 5.82 Measured CW large-signal performance of the 200 W . . . 154 5.83 Measured CW output power versus input power characteristics of the

200 W wideband Doherty PA . . . 154 5.84 Measured drain efficiency versus CW output power characteristics of

the 200 W wideband Doherty PA . . . 155 5.85 Measured CW output power and efficiency of the 200 W wideband

harmonically-tuned Doherty PA at power saturation as well as at 6 dB back-off operations . . . 155 5.86 Measured average drain efficiency and ACLR levels . . . 156 5.87 Equivalent-circuit diagram of the asymmetrical Doherty amplifier . . 160 5.88 Fundamental voltage amplitude at the main device output versus the

normalized input voltage . . . 161 5.89 Calculated main and peaking device load impedance modulation . . . 162 5.90 Calculated efficiency of the asymmetrical Doherty amplifier versus

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5.91 Calculated efficiency of the asymmetrical Doherty amplifier versus nor-malized frequency . . . 163 5.92 Calculated back-off efficiency of the asymmetrical Doherty amplifier at

various breaking point configurations . . . 164 5.93 Efficiency of the asymmetrical Doherty PA at 1.8 GHz, simulated and

measured at various main device supply voltages . . . 165 5.94 Measured CW output power versus input power characteristics of the

asymmetrical Doherty PA . . . 166 5.95 Measured efficiency versus CW output power characteristics of the

asymmetrical Doherty PA . . . 167 5.96 Measured output power and efficiency of the wideband asymmetrical

Doherty PA at power saturation as well as at back-off operations . . . 167 5.97 Measured average drain efficiency and ACLR levels of the asymmetrical

Doherty PA, before and after DPD linearization . . . 168

A.1 ADS circuit schematic of the 8 W uneven Si LDMOS Doherty amplifier 175 A.2 ADS circuit schematic of the 85 W uneven GaN Doherty amplifier . . 179

B.1 ADS circuit schematic of the 16 W dual-band GaN Doherty amplifier 183

C.1 ADS circuit schematic of the 20 W wideband uneven GaN Doherty amplifier . . . 187 C.2 ADS circuit schematic of the 20 W wideband unsymmetrical GaN

Do-herty amplifier (design band: 1.7-2.3 GHz) . . . 190 C.3 ADS circuit schematic of the 20 W bandwidth extended unsymmetrical

GaN Doherty amplifier (design band: 1.7-2.7 GHz) . . . 193

D.1 ADS circuit schematic of the 80 W wideband harmonically-tuned GaN Doherty amplifier . . . 198

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D.2 ADS circuit schematic of the 200 W wideband harmonically-tuned GaN Doherty amplifier . . . 201

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List of Tables

2.1 Material properties of common semiconductors devices . . . 7

3.1 Power amplifier requirements for medium range 3G base stations . . . 39 3.2 Comparison of published Si LDMOS Doherty PA performances . . . . 51 3.3 Performance comparison of the 85 W GaN Doherty PA to other published 57

5.1 Summary of the targeted properties for the wideband Doherty PAs . 82 5.2 State-of-the-art performance comparison of the 16 W dual-band

Do-herty PA . . . 93 5.3 Summary of the 20 W wideband uneven Doherty PA performance . . 104 5.4 Summary of the 20 W wideband unsymmetrical Doherty PA performance114 5.5 Summary of the 20 W bandwidth extended Doherty PA performance 128 5.6 Summary of the 80 W wideband harmonically-tuned Doherty PA

per-formance . . . 147 5.7 Summary of the 200 W wideband harmonically-tuned Doherty PA

per-formance . . . 157 5.8 State-of-the-art performance comparison of reported wideband

Do-herty amplifiers . . . 158 5.9 Summary of the 80 W wideband asymmetrical Doherty PA performance168

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List of Symbols

A Ampere C Capacitance (Capacitor) cm Centimeter cos Cosine dB Decibel

dBc Decibels referenced to the carrier dBm Decibels referenced to milliwatt eV Electron volt

f Frequency

GHz Gigahertz

gm Transconductance

gm3 Third-order harmonic generation coefficient

h Thickness

I Current

IDS Drain-source current

Imax Maximum current

j Imaginary unit k kelvin (kilo)

L Inductance (Inductor)

l Length

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MHz Megahertz

P Power

P1dB One decibel compression power

Pavg Average power

P2−T one Two-tone power

Pcomp Composite (overall) power

PDC DC supply power

Pm Power available at the main amplifier input

Pmax Maximum power

Pmax,f0 Maximum power at the center frequency

Pout Output power

Pp Power available at the peaking amplifier input

PRF Radio-frequency power

Psat Saturated power

Q Quality factor

R Resistance (Resistor) RL Load resistance

Ropt Optimum loadline impedance

s Second

S Scattering parameter S11 Input reflection coefficient

S21 Transmission coefficient

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sin Sine t Time tan Tangent V Voltage (Volt) VDS Drain-source voltage VGS Gate-source voltage Vin Input voltage

Vmax Maximum voltage

W Watt

Z Impedance

Zout Output impedance

∆f Frequency spacing

η Drain efficiency

η3dB Drain efficiency at 3 dB output back-off

η6dB Drain efficiency at 6 dB output back-off

η9dB Drain efficiency at 9 dB output back-off

ηcomp Composite (overall) drain efficiency

ηEnhancement Drain efficiency enhancement

ηsat Drain efficiency at saturated power

φ Phase

β Phase coefficient

Γ Reflection coefficient εr Dielectric constant

λ Wavelength

ξ Voltage back-off parameter

ω Angular frequency

Ω Ohm

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List of Abbreviations

and Acrynoms

2-DEG Two-dimensional electron gas

3G Third generation

3GPP Third generation partnership project

4G Forth generation

ACLR Adjacent-channel leakage ratio ACPR Adjacent-channel power ratio AlGaN Aluminium gallium nitride ADS Advanced design system

AM Amplitude modulation

AM-AM Amplitude-to-amplitude distortion AM-PM Amplitude-to-phase distortion

CDMA2000 Code-division multiple access at 2000 megahertz

CW Continuous wave

DC Direct current

DCS-1800 Digital cellular system at 1800 megahertz DPD Digital predistortion

DQPSK Differential quadrature phase-shift keying DSP Digital signal processor

EER Envelope elimination and restoration

EM Eletromagnetic

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FDD Frequency-division duplexing FET Field-effect transistor

FSK Frequency-shift keying GaAs Gallium arsenide GaN Gallium nitride

GMSK Gaussian minimum shift keying

GSM900 Global system for mobile communications at 900 megahertz HEMT High electron mobility transistor

IMD Intermodulation distortion

IMD3 Third-order intermodulation distortion I-V Current-voltage

LDMOS Laterally-diffused metal-oxide semiconductor LTE Long-term evolution

MESFET Metal-semiconductor field-effect transistor OFDMA Orthogonal frequency-division multiple access

PA Power amplifier

PAE Power-added efficiency

PAE6dB Power-added efficiency at 6 dB output back-off

PAE9dB Power-added efficiency at 9 dB output back-off

PAEsat Power-added efficiency at saturated output power

PAPR Peak-to-average-power ratio

PCS-1900 Personal communication service at 1900 megahertz QAM Quadrature amplitude modulation

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QPSK Quadrature phase-shift keying

RF Radio frequency

Si Silicon

SiC Silicon carbide

SMD Surface mount device

UMTS Universal mobile telecommunications system W-CDMA Wideband code-division multiple access

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Abstract

Modern wireless communications systems standardized for the third generation (3G) and fourth generation (4G) have introduced challenging requirements on the design of base station and handset transmitters. These communications systems are utilizing high data rate, spectrally-efficient digital modulation schemes (e.g. QAM, OFDMA). The resulting signals to be communicated have rapidly varying envelope over a wide dynamic range, which results in high levels of peak-to-average-power ratio (PAPR). To avoid signal clipping and spectral spreading, these signals need linear amplification. Therefore, the power amplifier unit has to be operated at considerable amounts of back-off, which in turn results in very low efficiency. Low efficiency operation in turn lowers device lifetime and increases the infrastructural and operational costs of the base station.

With this regard, the power amplifier becomes the most critical part of the transmit-ter. Power amplifiers that provide a good compromise between efficiency and linearity are crucial for modern communications systems.

Among others, GaN HEMT technology has proven itself to be a competent alternative to the conventional Si and GaAs technologies. The superior material properties of GaN together with the benefits of HEMT technology led to the design of devices with high power density, high efficiency, wideband capability and high frequency operation. The Doherty amplifier has been widely adopted in the last decade being a relatively simple efficiency-enhancement amplifier architecture. This amplifier can provide sig-nificant efficiency enhancement over single-ended amplifiers as well as inherent lin-earity.

There has been a lot of work on Doherty amplifiers in the recent years. Most of the published amplifiers were narrowband and do not fulfill the wideband/multi-band requirements of modern base stations. Widewideband/multi-band Doherty amplifiers or other efficiency-enhancement techniques are crucial for these base stations to reduce their overall size and cost. With regard to the Doherty amplifier, it was a convention that

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this technique is unsuitable for wideband applications due to the frequency sensitive impedance inverter in its structure. In this thesis, main focus was given to deeply study the bandwidth limiting factors of the Doherty amplifier, and possibly, to provide solutions that can help in extending the bandwidth of this amplifier technique. Being the clearest source of limited bandwidth, a complete frequency response analysis of the output combining network has been performed. From the analysis it was found that the Doherty amplifier can still provide back-off efficiency enhancement over class B amplifier up to a relative bandwidth of 56 % bandwidth. A modification on the output combining network was also proposed by using impedance inverters with less transformation ratio, which resulted in efficiency improvement by 9.2 % from that of the conventional Doherty amplifier up to 45 % bandwidth.

The derived analysis was then verified by the design and implementation of multi-ple wideband GaN Doherty amplifiers with state-of-the-art bandwidths ranging from 28 % to 42 % and output power levels from 20 W to 200 W. Superior performances were obtained with, for example, a minimum 6 dB back-off power-added efficiency (PAE) of 50 %, measured over 28 % bandwidth of an 80 W Doherty amplifier. Very good linearity was also characterized with the designed amplifiers using two-tone, UMTS and LTE signals. Additional linearization using memory polynomial digi-tal predistortion (DPD) resulted in ACLR levels that fulfill the requirements of the corresponding communications systems.

In order to extend the power range of the Doherty amplifier, a generalized frequency response analysis that applies for any Doherty amplifier configuration with arbitrary breaking point was derived. Based on the analytical results, the 80 W wideband Doherty amplifier was modified to operate at 9 dB back-off instead of 6 dB back-off power. High PAE of at least 45 % was then measured at around 9 dB output back-off, and over 28 % bandwidth.

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Zusammenfassung

Moderne drahtlose Kommunikationssysteme der dritten (3G) und vierten (4G) Gen-eration haben hohe Anforderungen an den Entwurf von Sendern in Basisstationen und Mobilteilen. Diese Kommunikationssysteme verwenden hohe Datenraten und spektral effiziente, digitale Modulationsverfahren (z.B. QAM, OFDMA). Die resul-tierenden Signale haben schnell ver¨anderliche Einh¨ullende mit hohem dynamischem Umfang. Zur Vermeidung von Verzerrungen und spektraler Spreizung m¨ussen diese Signale linear verst¨arkt werden. Der Leistungsverst¨arker muss daher weit im Back-Off-Bereich betrieben werden und geringe mittlere Wirkungsgrade sind die Folge. Mit geringen Wirkungsgraden gehen wiederum erh¨ohte Investitions- und Betrieb-skosten f¨ur die Basisstationen, beispielsweise infolge einer verminderten Lebensdauer der Transistoren, einher. In dieser Hinsicht ist der Leistungsverst¨arker die entschei-dende Komponente eines Senders und Verst¨arkerentw¨urfe, die sowohl einen guten Wirkungsgrad als auch gute Linearit¨atseigenschaften erzielen k¨onnen, sind innerhalb moderner Kommunikationssysteme von immenser Bedeutung.

GaN-Transistortechnologien haben sich gegen¨uber herk¨ommlichen Si- und GaAs-Tech-nologien als vielversprechende Alternative zum Aufbau effizienter HF-Hochleistungsver-st¨arker bewiesen. Infolge der ausgezeichneten Materialeigenschaften von GaN und den Vorteilen der HEMT-Technologie konnten Leistungstransistoren mit exzellen-ter Leistungsdichte, hoher Effizienz, sehr guten Breitband-Eigenschaften und guten Grenzfrequenzen entwickelt werden.

Als einfache Verst¨arkerarchitektur zur Steigerung des Wirkungsgrades wurde der Doherty-Verst¨arker in den letzten Jahren im großen Stil eingesetzt. Diese Architektur zeichnet sich gegen¨uber herk¨ommlichen Verst¨arkern durch einen deutlich verbesserten Back-Off-Wirkungsgrad bei guter Linearit¨at aus. In den letzten Jahren wurde auf dem Gebiet der Doherty-Verst¨arker eine Vielzahl unterschiedlicher Arbeiten ver¨offentlicht. Bei den meisten der ver¨offentlichten Verst¨arker handelt es sich dabei allerdings um schmalbandige Entw¨urfe, welche die Breitband-/Multi-Band-Anforderungen moderner

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Basisstationen nicht erf¨ullen. Insbesondere aufgrund des frequenzempfindlichen Impe-danz-Inverters als Teil der Doherty-Topologie, gilt der Doherty-Verst¨arker ¨ ublicherwei-se als Technik, die f¨ur Breitband-Anwendungen ungeeignet ist. Aufgrund der großen Bedeutung von breitbandigen hocheffizienten Leistungsverst¨arkern f¨ur moderne Kom-munikationssysteme wurden in dieser Arbeit zun¨achst die Bandbreite begrenzen-den Faktoren f¨ur den Doherty-Betrieb grundlegend analysiert. Infolgedessen kon-nten m¨ogliche L¨osungsans¨atze zur Erh¨ohung der Bandbreite von Doherty-Verst¨arkern abgeleitet werden. In diesem Zusammenhang wurde eine vollst¨andige Frequenzgan-ganalyse des Ausgangs-Combiners vollzogen. Als Ergebnis dieser Doherty-Analyse wurde festgestellt, dass sich im Vergleich zum Klasse-B-Betrieb eine Steigerung des Back-Off-Wirkungsgrades bis zu einer Bandbreite von 56 % erzielen l¨asst. Durch die Implementierung von Impedanz-Invertern mit reduziertem Transformationsverh¨altnis konnte außerdem gezeigt werden, dass der Wirkungsgrad gegen¨uber der herk¨ommlichen Doherty-Topologie um 9.2 % bis zu einer Bandbreite von 45 % gesteigert werden kann. Die Ergebnisse der Analyse wurden anhand einer Vielzahl von Breitband-GaN-Doherty-Verst¨arker mit exzellenten Bandbreiten von 28-42 % und Ausgangsleistungen von 20-200 W verifiziert. Beispielsweise konnte f¨ur einen 80-W-Doherty-Verst¨arker ein 6-dB-Back-Wirkungsgrad von PAE≥50 % ¨uber einer Bandbreite von 28 % nachgewiesen werden. Die Linearit¨atseigenschaften der entworfenen Verst¨arker wurden mit Hilfe von Zwei-Ton-Messungen bzw. Messungen mit UMTS- und LTE-Signalen unter-sucht. Nach der Linearisierung der Verst¨arker mittels digitaler Vorverzerrung wur-den sehr gute Linearit¨atseigenschaften nachgewiesen, die die Einhaltung der spek-tralen Anforderungen des jeweiligen Standards sicherstellen konnten. Um den Back-Off-Bereich von Doherty-Verst¨arkern zu erweitern, wurde außerdem eine allgemeine Frequenzganganalyse vollzogen, die f¨ur alle Doherty-Verst¨arker-Konfigurationen mit beliebigem Breaking-Point G¨ultigkeit besitzt. Basierend auf den analytischen Betra-chtungen wurde der 80-W-Breitband-Doherty-Verst¨arker derart modifiziert, dass f¨ur einen Back-Off-Bereich von 9 dB anstelle von 6 dB genutzt werden kann. Infolgedessen

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wurde ein Wirkungsgrad von PAE≥45 % bei 9-dB-Back-Off ¨uber einer Bandbreite von 28 % gemessen.

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Chapter 1

Introduction

Modern wireless communications systems offer a number of services besides voice calling to the increasing number of mobile users. Example services are video calling, video streaming, internet browsing and downloading. These increasing demands on mobile services require the implementation of high data rate transmission in the emerging communications systems. High data rate in turn results in broad modulation bandwidths. Therefore, spectrally-efficient signal modulation schemes have to be used to efficiently exploit the reserved bandwidth for the communications standard. Quadrature amplitude modulation (QAM), wideband code-division multiple access (W-CDMA) and orthogonal frequency division multiple access (OFDMA) are among this kind of modulation schemes. These modulation techniques result in signals with rapidly varying envelope over a wide dynamic range, which results in high levels of peak-to-average-power ratio (PAPR) [1].

Hence, transmitters in modern base stations have to take such signals into account. This requires power amplifiers that can provide very good linearity to preserve the time-varying envelope of the signal. High efficiency at the average power of the signal to be amplified is also required to avoid thermal problems in the base station transmitter and to minimize the operational costs. The power amplifiers are also required to operate over a broad bandwidth to cover the communications standard

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band or a number of standards simultaneously. Achieving these requirements together is a challenging task in power amplifier design, because of the trade-off between the design parameters. The main trade-off is that between efficiency and linearity. Any increase in the efficiency of the power amplifier comes usually at the expense of its linearity and vice versa [2]. The design of wideband high average efficiency power amplifiers is another challenging task which will be considered in this thesis.

High linearity can be achieved in power amplifiers by designing them to operate in backed-off class A or class AB modes. The linearity can be generally enhanced at device, circuit or system level. At device level, improved device processes can result in better device linearity. For example, through the use of field-plated HEMT struc-tures as in AlGaN/GaN devices [3]. Circuit level linearization can be achieved using techniques like derivative superposition [4]. At system level, additional linearization of the power amplifier can be implemented to enhance the linearity to the required level by the communications system [5].

However, due to the high PAPR of the signals in modern communications systems, using conventional amplifier classes in base station transmitters results in very low average efficiency due to the operation at considerable back-off levels. Hence, more complicated amplifier architectures have to be used to increase the average efficiency. In this regard, efficiency-enhancement power amplifier techniques have been devel-oped like the Doherty amplifier, envelope tracking (ET), envelope elimination and restoration (EER) and Chireix outphasing amplifiers [6]. The Doherty amplifier has been widely adopted for efficiency enhancement at back-off operation, due to its rel-atively simple circuitry compared to other efficiency-enhancement techniques and its inherent linearity. This thesis focuses on the analysis, design and characterization of microwave GaN Doherty amplifiers intended for use in the base station transmitters of modern communications systems. A number of design issues and problems will be addressed and solved. A special consideration will be given to solve the common bandwidth problem of the Doherty amplifier architecture. The frequency response of

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the Doherty amplifier will be derived for the first time to investigate the bandwidth capability of the original amplifier structure. Variations and improvements on the amplifier architecture will be proposed, analyzed and experimentally verified with the aim to extend the maximum achievable bandwidth of the amplifier.

In Chapter 2, a brief overview of device technologies will be given with emphasis on AlGaN/GaN HEMT technology being nowadays a promising technology for the design of high efficiency, high power and high linearity power amplifiers. After that, conventional amplifier classes as well as current-mode and switch-mode amplifiers will be reviewed. The principle of efficiency enhancement in power amplifiers will be then introduced and discussed based on the load-modulation principle. Next, the Doherty amplifier and its principle of operation will be also given. The fundamental concepts and definitions of linearity in power amplifiers will be discussed based on the type of stimulus. Linearization principles and techniques will be finally presented at the end of the Chapter.

Design and implementation of narrowband Doherty amplifiers will be presented in Chapter 3. A lower power (8 W) Si LDMOS Doherty amplifier will be first designed and discussed. A step-by-step design procedure will be presented considering load modulation, back-off efficiency enhancement, linearity considerations etc. After that, the design and implementation of a higher power (85 W) GaN HEMT based Doherty amplifier will be presented and discussed.

In Chapter 4, the bandwidth limiting factors of the Doherty amplifier will be first discussed. Each factor will be considered separately where possible solutions will be proposed. Next, the output combining network of the Doherty amplifier, being the conventional source of limited bandwidth, will be deeply studied and analyzed. The frequency response of the network will be derived to investigate its effect on the bandwidth of the Doherty amplifier. Expressions for output power and efficiency will be presented for the first time, which are valid over the whole signal dynamic range and at any arbitrary frequency. A variation on the output combining network will be then

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proposed to extend the bandwidth of the Doherty amplifier. The proposed network will be then analyzed to prove its proper performance in the Doherty architecture. Chapter 5 begins with the analysis and design of a 16 W dual-band Doherty am-plifier based on unequally-sized GaN HEMTs for the main and peaking amam-plifiers. After that, a number of 20 W wideband GaN Doherty amplifiers will be designed and implemented with bandwidths up to 42 %. The amplifier designs will consider the discussions and analyses presented in Chapter 4 to achieve wideband Doherty behavior over considerable bandwidths and in order to verify the analyses performed. Next, higher power (80 W and 200 W) wideband Doherty amplifiers will be also de-signed and implemented. Harmonic tuning techniques will be used to further enhance the average efficiency of the designed amplifiers. Furthermore, a method to absorb the back-off efficiency degradation effect due to the output combining network will be introduced and implemented to improve the back-off performance over the design band.

A generalized frequency response analysis will be performed to account for the asymmtri-cal Doherty amplifier besides the conventional amplifier. The analytiasymmtri-cal results apply for any arbitrary breaking point configuration. For verification, the designed 80 W Doherty amplifier will be modified to operate as wideband asymmetrical Doherty am-plifier. Excellent performance will be then shown at around 9 dB back-off power, and over the same design band of the conventional Doherty amplifier.

Finally, a summary of the research work results in this thesis as well as further work recommendations will be presented in Chapter 6.

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Chapter 2

Power Amplifiers and Efficiency

Enhancement

A power amplifier (PA) is a nonlinear circuit capable of amplifying a ‘large’ signal at a given frequency or in a given frequency band. The PA converts the DC supply power into a specific amount of radio frequency (RF) or microwave power. The generation of RF/microwave power is required not only for wireless transmission, but also in applications such as jamming, imaging and RF heating. Each application has its requirements on frequency, bandwidth, power, gain, efficiency and linearity. Mostly, a PA is not simply a single-ended small-signal amplifier driven into saturation. There is a large variety of PA topologies and techniques that can be used to achieve the requirements of different applications [7]-[9]. The basic building block of a PA is the active device (transistor), which plays a main role in determining the capability of the PA in terms of output power, gain, efficiency, linearity and bandwidth. Various bipolar and field-effect device technologies have been developed since decades to meet the continuing demands of communications systems.

A brief introduction to active devices used for power amplifiers is given in the first Section of this Chapter, particularly the gallium nitride (GaN) HEMT. Various classes of amplifiers are then reviewed in Section 2.2 where the principle of operation,

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ad-vantages, drawbacks and applications of each class will be discussed. In Section 2.3, the principle of efficiency enhancement in power amplifiers is defined, and a number of efficiency enhancement techniques based on different principles of operation are discussed, with emphasis on the Doherty amplifier which is the main topic of this thesis. Finally, linearity and linearization issues in power amplifiers are discussed in Section 2.4.

2.1

Active Devices for Power Amplifiers

Modern wireless communications systems standardized for third generation (3G) and fourth generation (4G) require highly linear and efficient RF power amplifiers. The most dominant device technologies in the past decades were silicon (Si) and gallium arsenide (GaAs) technologies [8]. However, the challenging demands of modern com-munications systems put tremendous constraints on the conventional Si LDMOS and GaAs MESFET devices [10]. To address these problems, researchers have focused their attention on the semiconductor materials used in power devices in order to de-velop high-performance building blocks for power amplifiers. Recently, high bandgap semiconductor materials, e.g. silicon carbide (SiC) and GaN have been developed for the RF power technology [8]. Particularly, GaN devices are nowadays emerging as the front runner, due to their high power density, gain and efficiency [11].

2.1.1

AlGaN/GaN HEMT

AlGaN/GaN HEMTs have proven themselves as competitive III-V semiconductor devices; they have a number of advantages over conventional Si and GaAs devices. For instance, the wide energy bandgap of GaN, its high breakdown field and thermal conductivity allow high power operation. GaN devices have high power per unit width. For example, a 10-times reduction in device size can be realized with GaN devices in place of conventional Si or GaAs devices while still delivering the same

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output power as the conventional device. With high power per unit width, GaN devices can be fabricated in smaller sizes which are easier to fabricate and result in much higher impedances that are more convenient for broadband matching [12], [13]. A summary of the important properties of common semiconductor materials is shown in Table 2.1.

Property Si GaAs GaN

Bandgap (eV) 1.1 1.43 3.4 Breakdown field (V/cm) 7x105 7x105 35x105 Saturation velocity (cm/s) 1x107 1x107 2x107 Saturation field (V/cm) 8x103 3x103 15x103 Thermal conductivity (W/cm-k) 1.5 0.46 1.7 Electron mobility (cm2/V-s) 1350 6000 1000 Hole mobility (cm2/V-s) 450 330 30 Dielectric constant 11.9 12.5 9.5

Table 2.1: Material properties of common semiconductors devices [10].

The structure of AlGaN/GaN HEMT is shown in Figure 2.1. A Si doped AlGaN layer is grown on the top of an undoped GaN layer. The AlGaN layer has larger energy bandgap than the GaN layer. This configuration causes the accumulation of electrons in lowest potential region (quantum well) beneath the AlGaN/GaN interface, forming a sheet of electrons with high density called two-dimensional electron gas (2-DEG). Electrons in the 2-DEG layer have high mobility since they are physically separated from the ionized Si atoms in the AlGaN layer [10], [14]. Across the AlGaN/GaN heterojunction exists a polarization field that affects the formation of the 2-DEG layer. A considerable amount of electrons transfer to the AlGaN/GaN interface resulting in 2-DEG layer of high density up to 1013cm−2 [15].

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Figure 2.1: Basic AlGaN/GaN HEMT structure [10].

performance and cost of fabrication. Silicon (Si), silicon carbide (SiC) and sapphire are common substrate materials for AlGaN/GaN HEMTs. SiC has superior thermal conductivity but is more expensive than Si and sapphire. On the other hand, Si is cost effective and has higher thermal conductivity than sapphire [10].

2.2

Amplifier Classes of Operation

Power amplifiers are generally classified into two groups (classes):

1. Conventional amplifiers (classes A, AB, B and C): These amplifier classes are defined based on the amount of bias current which determines the conduction angle. The latter represents the portion of the RF cycle during which the transistor operates in its active region (i.e. behaves as a controlled current source) [16].

2. Current-mode and switch-mode amplifiers: These amplifier classes are defined based on how the active device (transistor) is being considered. For current-mode classes, the device is considered as a controlled current source, like class F and harmonically-tuned amplifiers. In switch-mode amplifiers, the device is considered as a switch, e.g. class D and E amplifiers [17].

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2.2.1

Conventional Amplifiers

Conventional classes of amplifiers are classified based on the conduction angle of the active device. Figure 2.2 shows the output current waveform and the bias point location on the I-V characteristics for each of the conventional classes A, AB, B and C. To simplify the analysis of conventional amplifier classes, the following assumptions

Figure 2.2: Conventional amplifier classes defined based on the conduction angle (left) or the device quiescent current (right) [17].

are to be considered [8], [10]:

- The active device has ideal linear characteristics, i.e. the output current is directly proportional to the input voltage (constant transconductance gm).

- Higher order harmonics are short circuited. - The device has zero knee voltage.

- A sufficiently high input voltage swing is applied to drive the device up to the maximum linear output power.

The output (drain) current at a conduction angle α can be expressed as [8]

IDS(θ) =      IDS0+ Ipeakcos(θ) |θ| < α/2 0 α/2 < |θ| < π (2.1)

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where θ = ωt, IDS0 is the quiescent bias current and Ipeak is the amplitude of the

output current waveform.

Note from (2.1) that the current cut-off points are at ±α/2. The output current waveform is shown in Figure 2.3.

The amplitudes of the DC and fundamental components of the output current IDS

can be extracted from a Fourier series expansion of the waveform shown in Figure 2.3 (b) as [10] IDC = IDS0 = Imax 2π 2 sin(α/2) − α cos(α/2) 1 − cos(α/2) (2.2) and IDS,f0 = Imax 2π α − sin(α) 1 − cos(α/2) (2.3)

The fundamental output power delivered to the load ZL can be expressed as

Pout = 1 2VDS,f0IDS,f0 = VDS,f0Imax 4π α − sin(α) 1 − cos(α/2) (2.4)

where VDS,f0 is the amplitude of the fundamental output voltage, which has a

maxi-mum value equal to the drain supply voltage VDS0(maximum voltage swing amplitude

on the I-V characteristics).

The drain efficiency can then be obtained as

η = Pout PDC = 1 2 VDS,f0IDS,f0 VDS0IDS0 . (2.5)

At the maximum output voltage swing, the efficiency reaches its maximum given by

ηmax = VDS0 2VDS0 IDS,f0 IDS0 = IDS,f0 2IDS0 = (α − sin(α)) 2 [2 sin(α/2) − α cos(α/2)]. (2.6) The optimum load is expressed as

Ropt = ZL= VDS,f0 IDS,f0 = 2πVDS0 Imax (1 − cos(α/2)) (α − sin(α)) . (2.7)

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Figure 2.3: (a) Active device with short-circuited higher order harmonics and (b) wave-forms of the input voltage and output current of a conventional amplifier with a conduction angle α [12].

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noticed from the figure, the efficiency drops as the conduction angle increases from 0 to 2π.

As a conclusion, it can be noticed that class-A amplifier with a conduction angle of 2π produces no harmonic currents (purely linear), but has a maximum efficiency of only 50 %. Class-A amplifiers can be used as drivers which require high linearity. For class-B operation (α = π), the maximum efficiency increases to 78.5 %, but the amplifier creates more harmonic distortion. An intermediate situation with higher efficiency than class-A and better linearity than class-B is the class-AB case, with a conduction angle between π and 2π. Class-AB amplifiers represent a good choice for applications requiring high efficiency and good linearity, e.g. wireless mobile communications [10]. If the device is biased under pinch-off level (α < π), then the efficiency can increase up to 100 %, but this will be at the expense of fundamental output power. This class of operation is called class-C, which can be used in applications like Doherty amplifiers [18].

2.2.2

Current-Mode and Switch-Mode Amplifiers

The conventional amplifier classes discussed in Section 2.2.1 can achieve high efficien-cies at reduced conduction angles (e.g. up to 100 % in class-C case). However, these efficiencies are only reachable at small amounts of output power together with nonlin-ear behavior [19]. There are, however, situations in which linnonlin-earity can be traded for efficiency and RF output power. Communications systems using modulation schemes like FSK or GMSK can tolerate high levels of amplitude distortion. Other applications using QPSK or DQPSK can also tolerate significant amounts of amplitude distortion [8]. Therefore, amplifier classes like current-mode and switch-mode amplifiers have been developed to achieve high efficiency and high power.

- Class-F amplifier:

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output power by using harmonic resonators at the output network to shape the drain voltage waveform such that the active device sees a short at even harmonics and an open at odd harmonics [20]. The efficiency can be theoretically increased up to 100 %, with the amount of increase depending upon which harmonics are controlled [21]. In an ideal case, a half sinusoidal current waveform and a rectangular voltage waveform are produced at the drain. The waveforms are out of phase (180o shifted from each

other). In this case, there is no overlap between the drain current and voltage wave-forms, resulting in no power dissipation in the active device and an efficiency of 100 %. In practice, the number of harmonics that can be tuned depends on the power gain

Figure 2.5: (a) Third harmonic peaking Class-F amplifier schematic. (b) Drain current and voltage waveforms.

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cut-off frequency fmax of the device. Moreover, circuit complexity increases if more

harmonics are to be tuned. Generally, the analysis of class-F amplifiers considers up to the third harmonic. In this situation the class-F amplifier is often referred to as a third harmonic peaking amplifier as shown in Figure 2.5 [10]. The half sinusoidal current waveform can be obtained by biasing the active device in class-B mode. This case however results in only even harmonics in the current waveform. Therefore, a deep class-AB operation is usually preferred for class-F amplifier to be able to gener-ate odd harmonics that are used to shape the rectangular voltage waveform [8]. The drain voltage waveform as shown in Figure 2.5 consists of fundamental and third har-monic components. The presence of the third harhar-monic component results in higher fundamental voltage amplitude and hence higher fundamental output power [10]. The dual case of class-F amplifier, namely the class-F−1, is the case where the current

and voltage waveforms are swapped, with a rectangular current waveform and a half sine voltage waveform. In this class of operation the output network provides short circuit for the odd harmonics and open circuit for the even harmonics [22].

- Class-D amplifier:

The circuit diagram of a class-D amplifier is illustrated in Figure 2.6. The bypass capacitor C2 is large enough to keep the voltage at point A equal to the DC supply

voltage VDS0. A series RLC resonant circuit consisting of RL, L1 and C1 allows only

the fundamental component of the drain voltage to pass to the load RL. A 2-way

switch, implemented by a pair of transistors (operating as switches), creates a square voltage waveform across the resonant circuit, and a pure sinusoidal current waveform with no DC offset. Since the transistors conduct only in saturation mode, at all times there is no overlap between the drain voltage and current, so the power dissipation is zero and the theoretical efficiency is 100 %. Due to device parasitic effects and switching time, the efficiency is usually degraded in practice. Class-D operation is usually limited to low-frequency applications like AM and short-wave broadcasting [7], [23].

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- Class-E amplifier:

Unlike class-D amplifier, class-E employs a single transistor operated as a switch. Figure 2.7 shows the schematic diagram of class-E amplifier. As shown in the figure,

Figure 2.6: Class-D amplifier. (a) Schematic (b) Voltage and current waveforms at the output of the switch.

the drain voltage waveform results from charging the shunt capacitor C1 by the DC

and RF components of the current IC. During the time when the ideal switch is ON,

the drain voltage drops to zero. At any time, either the drain voltage or current is zero resulting in no power dissipation and 100 % efficiency. Class-E eliminates the losses associated with charging the drain capacitance in class-D [7], [10], [23].

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Figure 2.7: Class-E amplifier. (a) Schematic (b) Voltage and current waveforms.

2.3

Efficiency Enhancement in Power Amplifiers

Modern wireless communications systems standardized in the recent years, e.g. UMTS, LTE and WiMAX, led to new challenges in the design of microwave power amplifiers. These communications systems use bandwidth-efficient high data rate modulation schemes. The resulting envelope modulated signals have a rapidly changing instanta-neous power over a relatively wide dynamic range as shown in Figure 2.8. The ratio of the signal peak power to its average power is called the peak-to-average-power ratio (PAPR), which can reach up to 12 dB in the modulated signals of modern com-munications systems [24]. In order to avoid clipping of the signal peaks, the PA has to operate at back-off power. Both the conventional and harmonically-tuned/switch-mode PAs discussed in the previous Section provide high efficiency only near the maximum output power. Using these PAs to amplify high PAPR signals by driv-ing them into saturation for high efficiency performance causes clippdriv-ing of the signal

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S i g n a l L e ve l Time

Figure 2.8: Time-domain waveform of a 3G W-CDMA signal.

peaks which results in a distorted envelope (modulating signal). Therefore, the PA has to operate at power back-off condition. However, the efficiency decreases dramat-ically with power back-off which makes the PA inefficient when it is used to amplify signals with high PAPR levels as illustrated in Figure 2.9. As an example, an ideal-ized class-B amplifier has an efficiency of 78.5 % at maximum output power. At 6 dB output back-off, the efficiency reduces to 39.3 %. Low efficiency PA operation causes higher power consumption and cooling costs in the base station, and shorter battery lifetime for the mobile handset. To solve this problem, efficiency enhancement PA techniques, e.g. the Doherty amplifier, envelope tracking (ET), envelope elimination and restoration (EER) and Chireix outphasing amplifier [25], have been developed.

2.3.1

Efficiency Enhancement by Load Modulation

The principle of efficiency enhancement based on load modulation can be clarified based on the analysis of the idealized class-B amplifier [8]. In this case, ideal class-B output current waveform (half sine wave) and constant transconductance gm (linear

amplification) are assumed. All higher-order harmonic currents are short circuited using a high-Q LC resonator as illustrated in Figure 2.10 in order to retrieve funda-mental current and voltage waveforms at the load RL.

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Figure 2.9: Illustration of the degraded average efficiency in a single-ended amplifier when driven by a modulated signal with a significantly varying envelope (high PAPR).

The load impedance RLis chosen to be the optimum impedance that causes maximum

RF output voltage swing at the maximum RF current amplitude, that is;

RL= Ropt = 2

VDC

Imax

(2.8)

where Imax/2 is the maximum fundamental component of the drain current. The

maximum RF output power can then be expressed as

PRF,max=

VDCImax

4 (2.9)

While the DC supply power can be written as

PDC,max=

VDCImax

π (2.10)

so, a maximum drain efficiency of ηmax = PRF,max/PDC,max = 78.5 % can be obtained

with the ideal class-B amplifier. Now, if the input gate voltage is reduced by a factor p from the value that causes maximum drain current swing, then the fundamental output current and voltage amplitudes can be written as

I1 =

Imax

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and V1 = Imax 2p Ropt = VDC p (2.12)

resulting in RF output power of

PRF =

VDCImax

4p2 (2.13)

and DC supply power of

PDC =

VDCImax

pπ . (2.14)

In this case the drain efficiency will be

η = π

4p. (2.15)

For instance, if the input power is decreased by 3 dB, i.e. p = √2, then the output

Figure 2.10: (a) A FET in class-B amplifier operation with all harmonic currents short circuited (b) Input gate voltage and output drain current and voltage wave-forms.

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power will be also reduced by 3 dB and the efficiency degrades to a value of 55.5 %. At 6 dB back-off the efficiency reduces to 39.3 %. The reason for this drastic efficiency decrease is that the load impedance RL is no more optimum at back-off operation

to cause a full drain voltage swing. This problem can be simply solved by choosing the optimum load impedance for each back-off level that results in maximum voltage swing and hence maximum efficiency of 78.5 %, which is the principle of dynamic load modulation. Generally, if a load impedance Rp is chosen at a voltage back-off given

by the factor p, then the maximum efficiency of 78.5 % can be always achieved if

Rp =

VDC

Imax

2p (2.16)

which results in RF and DC power of

PRF,p = VDCImax 4p (2.17) PDC,p = VDCImax pπ (2.18)

and hence an efficiency of 78.5 %. The realization of a dynamically tunable load can be achieved by means of dynamically tunable matching networks as in [26], [27] (passive load modulation) or through the implementation of active load-modulation principle like in the Doherty amplifier.

2.3.2

The Doherty Amplifier

As previously mentioned, there are different approaches for the realization of efficiency enhancement power amplifiers. Techniques like the Doherty amplifier and PAs with dynamically tunable matching networks are based on the dynamic modulation of the load. Other techniques like ET [28] and EER [29] are based on the bias adaptation principle, where the drain bias of a single-ended PA is dynamically controlled based on the input power level to achieve higher efficiency at back-off operation with a fixed load. Bias adaptation techniques require more complex circuitry (for envelope detection) than the Doherty technique.

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The Doherty amplifier, first proposed by W. H. Doherty in 1936 [30] is one of the most common efficiency enhancement techniques due to its relatively simple circuitry, the significant efficiency enhancement it can achieve at back-off operation and its inherent linearity [31]-[33]. Its operation is based on the active load-pull principle, where the load of an amplifier can be dynamically modulated by applying RF current from a second, phase coherent amplifier.

The active load-pull principle is illustrated in Figure 2.11, where two amplifiers, rep-resented by current sources generating the currents I1 and I2, are connected to a

common load RL. The voltage across the common load is expressed as

I1 VL RL I2

Z1 Z2

Figure 2.11: A schematic illustrating active load-pull principle [8].

VL= RL(I1+ I2) (2.19)

the load impedance seen by the amplifier to the left is

Z1 = RL I1+ I2 I1 = RL(1 + I2 I1 ) (2.20)

while the impedance seen by the other amplifier can be written as

Z2 = RL

I1+ I2

I2

. (2.21)

From (2.20) it can be clearly noticed that the impedance seen by the amplifier to the left Z1 can be changed (pulled) by changing the magnitude and/or the phase of

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a higher value if I2 is in phase with I1, and to a lower value if I2 and I1 are out of

phase.

The Doherty amplifier is based on the same principle discussed above, with two devices; the main (carrier) and the peaking (auxiliary) devices having a common load and interconnected through a quarter-wave impedance inverter as shown in Fig-ure 2.12.

I

1

V

1T Ropt/2

I

2

Z

1

Z

1T

Z

2

V

1 l/4, ZT Impedance inverter Vmax Vmax/2 0 0 Imax/4 Imax/2 I1 I2 Input Voltage Device Current Fundamental

I

1T

Figure 2.12: Basic schematic of the Doherty amplifier and the corresponding fundamental current amplitudes of the main and peaking devices [8].

The auxiliary device is assumed to turn ON at a specific input power level (breaking point), typically 6 dB backed-off from the maximum total power of the Doherty am-plifier, then it starts to generate the current I2 that increases until it reaches the same

maximum value of I1 at maximum power operation as shown in Figure 2.12. Below

the breaking point the auxiliary device shuts down and generates no RF current. The quarter-wave impedance inverter plays an important role where it transforms the

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in-creasing common load impedance into a dein-creasing impedance seen by the main device as the peaking current I2 increases. Both the main and peaking devices are assumed

to operate in class-B mode with the assumptions made in the previous subsection. For the upper 6 dB regime, both devices are active and generate RF current ampli-tudes of I1 = Imax 4 (1 + ξ) (2.22) I2 = Imax 2 ξ (2.23)

where ξ is a back-off parameter between 0 (breaking point) and 1 (maximum power point). Similar to (2.20) and (2.21) the impedances Z1T and Z2 can be expressed as

Z1T = Ropt 2 (1 + I2 I1T ) (2.24) Z2 = Ropt 2 (1 + I1T I2 ) (2.25)

where Roptis the optimum load line impedance for class-B mode as given by (2.8). For

the impedance inverter with characteristic impedance ZT, the relationship between

the input and output voltages and currents is given by

V1TI1T = V1I1 V 1T I1T  V 1 I1  = ZT2 (2.26)

From (2.26) I1T can be written as

I1T =

V1

ZT

(2.27)

so, equation (2.24) can be rewritten as

Z1T = Ropt 2 (1 + I2ZT V1 ).

The impedance seen at the output of the main device can then be expressed as

Z1 = Z2 T Z1T = 2Z 2 T Ropt(1 + I2VZ1T) (2.28)

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and hence the RF voltage amplitude across the main device can be written as V1 = Z2 T  Imax 2  (1 + ξ) Ropt[1 + ξ(Imax2 )ZT V1 ]

which can be rearranged to become

V1 = (

ZT

Ropt

)(Imax

2 )[ZT + ξ(ZT − Ropt)]. (2.29) Now if the characteristic impedance of the impedance inverter is set to ZT = Ropt,

then the resulting expression for V1 will be independent on the parameter ξ, i.e.

independent of the back-off level, and remains constant at an amplitude of

V1 = Ropt(

Imax

2 ) (2.30)

which represents the maximum voltage swing with the amplitude of VDC as given by

(2.8). Having solved for V1, and referring to (2.26), the voltage across the common

load V1T can be derived as

V1T = I1ZT = I1Ropt (2.31)

so the total output voltage of the Doherty amplifier (V1T) increases linearly with the

main current I1, which has also a linear relationship with the input voltage as

as-sumed in the analysis. This means that the output voltage of the Doherty amplifier increases linearly with the input voltage, resulting in inherent linearity of this am-plifier architecture [8]. The RF amplitudes of the main device output voltage (V1)

and the total output voltage V1T are shown in Figure 2.13. Regarding the active

load-pull mechanism, the peaking current I2 works to modulate the impedance seen

by the main device (Z1) from the higher value of 2Ropt in the low-power region to the

lower value of Ropt at the maximum power point. Substituting for I1T, I2 and V1 in

(2.25) and (2.28) and assuming ZT = Ropt results in the following expressions for the

impedances seen by the main and peaking devices, respectively,

Z1 =

2Ropt

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Figure 2.13: RF amplitudes of the main (V1) and peaking (V1T) device output voltages,

with the latter representing the total output voltage across the common load, versus the amplitude of the input voltage of the Doherty amplifier [8].

Z2 =

Ropt

2 (1 + 1 ξ)

which are dynamically modulated according to the input voltage level as illustrated in Figure 2.14. Referring to the RF voltage amplitudes in Figure 2.13, it can be noticed that the main device maintains a maximum voltage swing over the upper 6 dB regime, so it operates at 78.5 % efficiency over this dynamic range. The peaking device voltage is linearly increasing until it reaches its maximum at the maximum power point, which means that it operates at efficiency less than 78.5 % in the upper 6 dB regime. The effect of this operation on the overall efficiency of the Doherty amplifier is modest as will be shown in the forthcoming analysis.

In the low-power region (below the breaking point), only the main device is active and contributing to the output power of the Doherty amplifier. The efficiency can then be expressed as

η = 2A(π

4), 0 < A < 0.5 (2.32)

where A = Vin

Vmax is the normalized input voltage. In the upper 6 dB regime, both

devices are active and the composite output power can be calculated as

Pcomp = I2 1Ropt2 2 2 Ropt = I12Ropt

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0 V m ax 0.5V m ax 0 Peaking Main 4R opt 3R opt R opt 2R opt I m p e d a n c e M a g n i t u d e Input Voltage

Figure 2.14: Active load modulation behavior in the Doherty amplifier.

which after substituting for Ropt from (2.8) becomes

Pcomp = A

Imax

2 VDC. (2.33)

The DC supply power of the main and peaking devices can be expressed as

PDCm= A Imax π VDC PDCp = 2(A − 0.5) Imax π VDC resulting in a total DC supply power of

PDC = PDCm+ PDCp = (3A − 1)

Imax

π VDC. (2.34)

The overall efficiency of the Doherty amplifier in the upper 6 dB regime can then be obtained by combining (2.33) and (2.34) resulting in

ηcomp = Pcomp PDC = π 2 A2 (3A − 1) (2.35)

which has a value of 78.5 % at both the 6 dB back-off point and the maximum power point as illustrated in Figure 2.15. The Doherty amplifier has twice the efficiency of

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class-B amplifier at 6 dB power back-off. The small dip in efficiency in the upper 6 dB regime is caused by the peaking device which is not operating at full voltage swing as depicted in Figure 2.13.

The realization of the Doherty amplifier using solid-state devices is usually achieved by using a class-B/AB amplifier as the main amplifier and a class-C amplifier as the peaking amplifier. The class-C peaking amplifier is suitable to realize a current characteristic similar to that in Figure 2.12, but in this case a problem arises that the maximum amplitude of peaking current might not be reachable. This problem can be solved by using a higher power peaking device [32], [34] or by using uneven power divider to inject more input power to the peaking device than to the main device [35], [36]. -20 -15 -10 -5 0 0 20 40 60 80 Class B Doherty 6 dB back-off = 78.5 % D r a i n E f f i ci e n cy ( % )

Output Power Back-off (dB)

Figure 2.15: Drain efficiencies of the Doherty amplifier and ideal class-B amplifier as a function of output power back-off.

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