MANUAL DC

STD 7000 7501

Medium Power

DC Driver Card

USER'S MANUAL

NOTICE

The information in this document is provided for reference only. Pro-Log does not assume any liability arising out of the application or use of the information or products described herein.

o

•

•

o

o

7501

Medium Power DC Driver Card USER'S MANUAL

(O~Dd) ~o~~:~~~

FORWARD

This manual explains how to use Pro-Log's 7501 Medium Power DC Driver Card. It is structured to reflect the answers to basic questions that you, the user, might ask yourself about the 7501. We welcome your suggestions

on how we can improve our instructions.

0

The 7501 is part of Pro-Log's Series 7000 STD BUS hardware. Our products are modular, and they are designed and built with second-sourced parts that are industry standards. They provide the industrial manager with the means of utilizing his own people to control the design, production, and maintenance of the company's products that use STD BUS hardware.

Pro-Log supports its products with thorough and complete documentation. Also, to provide maximum assistance to the user, we teach courses on how to design with, and to use microprocessors and the STD BUS products.

You may find the following Pro-Log documents useful in your work: Microprocessor User's Guide and the Series 7000 STO BUS Technical Manual. If you would like a copy of these documents, please submit your request on your company letterhead.

o

o

o

()

7501 MEDIUM POWER DC DRIVER CARD

SECTION SECTION 2 SECTION 3 SECTION 4 SECTION 5 SECTION 6 SECTION 7

TAB LEO F CON TEN T S Data Sheet

'Funct i ona 1 Descr i pt ion Mapping

Electrical and Environmental Specifications Mechanical

Operating Subroutines

Assembly drawing ~nd Schematic

iii

o

o

o

u@@@ 7501

o ~u[Q)[IDlliJ~ MEDIUM POWER DC DRIVER CARD

()

The 7501 provides sixteen independent DC output circuits for the 7000 Series STD BUS, Each open col/ector output circuit is capable of sinking up to +225mA of current in the on-state and can with- stand a +50V output level in the off-state, Diode clamping is included to limit the output voltage when driving inductive loads, Separate user- supplied clamp voltage inputs are provided for each group of four outputs, Sixteen LEOs provide a visual indication of the state of each output.

FEATURES

• 16 Independent DC Output Circuits

• +22SmA Current Sink Rate

• +SOV Output Rating

• Diode Clamp for Driving Inductive Loads

• Ground Return for each Output Circuit

• LED Indicator for each Output Circuit

• Standard 40-pin Flat Cable Connector

• Clear Plastic Safety Shields

07-011 ~'<---+--I

A7-Ae 0 - - - - 1

IOREa' ...,---.---'UO WR' o---a

SYSRESET' O - _ + _ - - - . J DC OUTPUT

r - - - - - - STATl); - - - -,

I INDICATORS I

I ¥ I

20

CIRCUITS 4-15

7501 'INDICATES ACTIVE LOW LOGIC

1

SECTION 2 FUNCTIONAL Operation

The 7501 converts TTL level stgnals supplied by the STD BUS to latched, negative true, open-collector DC drtve signals. ThIs conversion process begins by strobing eight bits of data into one of two fully decoded write""only output port latches.

These latches are cleared at power on by the SYSRESET;', signal ^~ A medlum power logic driver, as shown in the accompanying figures, converts the si'xteen latched output signals to an inverted, open collector signal, The driverls outputs are then brought to a 40-pin flat cable connector at the user interface card edge. Alternating ground and output wires minimize crosstalk on the flat cable.

When driving inductive loads, a diode clamp protects each medium power logic driver output from high voltage breakdown. This diode is connected between the user-supp..]ied clamp voltage (+50V or less) and the output signal lj"ne .. When the logic driver is switched off (no current sink), the inductive current surge raises the collector output voltage above normal levels. When the output

voltage exceeds the clamp voltage, the clamp diode will limit the collector voltage to approximately the clamp voltage. A separate clamp voltage input is provided for each group of four outputs (16 outputs, 4 groups) at the user rnter~

face connector. The clamp voltage must be greater than or equal to the ^off~

state output voltage for each output, but less than +50V. All output signals

o

are monitored for the low (active) state by LEOs. A diode protects each LED

from reverse voltage breakdown.

0

.Vee ^~

Lb4re4-

r

Xc..

Jlz' ^L-

lN4t41S

PORi

1Itc..1

nATA

i\6r :

flltN ^'IL- _l

£

-

4 7V,cJICA.- 750/ CU7rtt7 S7Afd:? ~

I .. ^utSGl?

0

o

1IlX-

po~r

MrA cd /

~ \

VturotJ

II- 0----1

---~---.--

L

CVJ~jNQ

UNTIL.. !..CAD Cf../ReEv'7 bL-.ss J P't?et::> ~

3

_ _ . . . I#tGYOl&JAMllW1&£&4Wi#.&AiAi=r:"'.",U<& ;;, ;;# ,. ,. 4; " MWAI#¥#%M 4k¥H I .##4 -'I.

SECTION 3 MAPPING

The 7501 consists of two B.-bit output ports that may\ be placed anywh.ere i'n the I/O address space of OO-FF. These ports occupy two consectui've address locattons~

The 7501 is shipped with hexadecimal port address 40 (port 0 address) and port address 41 (port 1 address). These port addresses are selected ^by Jumper w{re~,

To remap the 7501 to another address set, the user connects one jumper w1re on each of SX, SY, SZA and SZB as shown in the Card Address Selection diagram.

The I/O address mapping and jumper selection table for 2 addresses per card shows where to place jumper straps to obtain any two sequential port addresses

in the hexadecimal range OO-FF. Using the lowest of the 2-digft hexadecimal addresses desired, find the most significant hexadecimal address digit along this vertical axis, and the least significant hex digit on the horizontal

axis. For example, port addresses 40 and 41 are obtained by connecting Jumpers at X2, YO, 10 and ll.

The only restriction that applies in address selection for the 7501 is the lower of the two port addresses (40 as shipped) must occur only at every second possible address. For example, the sequence 41 and 42 i's not allowed by the decoder.

The pad matrices adjacent to U4, US and u6 are on 0.10 inch (O,25cm) centers, The jumper wires may be conveniently replaced by wirewrap post if frequent address selection changes are anticipated.

o

o

o

CARD 5ELECT DECODER5

0

6 X5

13 55

15 ^C X4

54 53 4 X3

14 B X2

52

51 X1

.q ^{15 A} XO

50

5X

57 9 Y7

12 D Y6

74L542

~ ^{13 C}

Z~ 14

B Y2

. 'C:J ₅₂

51 Y1

l. 15 A YO

50

5Y 5Y PORT 5ELECT DECODER lORa-

12 57

WR" D

74L542 56

13 55

C 54

PORT •

0

51 Z1

15 pO~t

2.<1 A 0 ZO

50 SrRO~e. ..

1/0 Address Decoder And Schematic For 2 Addresses Per Card

LEAST SIGNIFICANT HEX ADDRESS JUMPER

MOST

o 11 1 2 1 3 4151617 8 1 9 1 A

I

SIGNIFICANT X, V & Z

HEX ADDRESS

ZO I Z1 I Z2 I Z3 ZO I Z 1 I Z2 I Z3 ZO I Z1 I Z2 I Z3 ZO I Z1 L Z2 I Z3 -z

0 XO VO XO V1 XO V2 XO V3

1\

1 XO V4 XO V5 XO V6 XO V7

2 X1 VO X1 Y1 X1 V2 X1 V3

3 X1 Y4 X1 Y5 X1 Y6 X1 Y7

4 X2 YO X2 Y1 X2 Y2 X2 Y3

5 X2 V4 X2 V5 X2 V6 X2 V7

6 X3 VO X3 V1 X3 V2 X3 Y3 X

7 X3 Y4 X3 Y5 X3 V6 X3 V7

AND

8 X4 VO X4 Y1 X4 Y2 X4 Y3

9 X4 Y4 X4 Y5 X4 V6 X4 Y7 V

A X5 YO X5 Y1 X5 Y2 X5 Y3

B X5 Y4 X5 Y5 X5 V6 X5 Y7

C X6 VO X6 Y1 X6 Y2 X6 V3

D X6 V4 X6 Y5 X6 Y6 X6 Y7

E X7 VO X7 Y1 X7 Y2 X7 Y3

V

F X7 Y4 X7 Y5 X7 Y6 X7 Y7

1/0 Address Mapping and Jumper Selection Table for 2 Addresses Per Card.

5

a l l --=wwa:&=_U14MiOii4MiiIC#ierM4AiM4P#diQ_ 'i" ^{_01# i, "} 4T\WW¥## 4iP#/f¥4

ADDRESS DECODER OPERATION

Refer to the shcematic, Document #105194

The 7501 uses three cascaded 74LS42 decoders (U4, U5 and u6) to decode address lines AO-A7. These decoders are enabled only when 10RQ* and fOEXP* is active.

The WR* signal is used to gate the select strobes from u6 that control the output ports.

CHANGING THE 7501 PORT ADDRESS

Refer to the assembly diagram, Document #105195

Locate deocders U4, U5 and u6 (74LS42) adjacent to the STD BUS edge connenctor.

Each decoder device has a dual row of pads which form decoder output select matrices. Make one (and only one) connection to each of the matrices adjacent

to u4 and U5. Make two connections to the matrices adjacent to u6.

The decoder jumper pad numbering figure shows the numbering of the pads adjacent to the decoder chips on the 7501. Also shown are the jumpers (at X2, V), SZA and SZB) which produce hexadecimal port addresses 40 and 41, the selections made when the card is shipped.

u4

SX ⁹

.,

~

., .,

I

%

Sy _{0 0 0 0 0 0 0}

0 1- 3

"

I

SZA

~ ~

0

,

DECODER JUMPER PAD NUMBERING

o

0

0 I

1

SECTION

4

ELECTRICAL AND ENVIRONMENTAL SPlCIFICATIONS

7501 Medium Power DC Output Card Electrical Specifications

RECOMMENDED OPERATING LIMITS ABSOLUTE NON-OPERATING LIMITS

MNEM. PARAMETER

MIN. TYP. MAX. MIN. MAX. UNIT

Vee Supply voltage 4.75 5.00 5.25 0.0 7.00 Volt

TA Free air temp. 0 25 55 -40 75 °C

RH ^{Humi d i ty}

CD

User Electrical Characteristics over Recommended Operating Limits

MNEM. PARAMETER MIN. TYP. MAX. UNIT

VOL Low level user output voltage .45 0.8 volt

VOH High level user output voltage 50 volt

IOL Low level user output current 225 rnA

---Yc User-supplied clamp voltage 50 volt

User output current duty cycle 100 %

STD BUS Electrical Characteristics over Recommended Operating Limits

o

lee STD BUS supply current 600 1000 ^rnA

STD BUS input load See STD BUS Edge Connector Pin List

1 1

STD BUS output drive See TD BUS Edge Connector

S

1 I

Switching Characteristics over Recommended Operating Limits

MNEM. PARAMETER FROM TO MIN. TYP. MAX. UNIT

TpHL PROPAGATION TIME STD DATA BUS USER IFC 110 nsee .

TpLH PROPAGATION TIME ., .,

110 nsee.

TpHL. PROPAGATION TIME USER IFC STD DATA BUS 110 ,usee.

TpLH PROPAGATION TIME ^{H .,} 110 ,usee.

o _Q)

7

AiQiQiiA&AMWA&&t4Mll&WMMQM'ANMa;,;;4AM .,=-4M4=,#4;; , UM; 1#

STO/7501 USER CONNECTOR PIN LIST

PIN NUMBER PIN NUMBER

MNEMONIC MNEMONIC

Ground 2 1 Clamp 0-3

o

Ground 4 3 Output 0"

Ground 6 5 Output 1"

Ground 8 7 Output 2"

Ground 10 9 Output 3"

Ground 12 11 Clamp 4-7

Ground 14 13 Output 4"

Ground 16 15 Output 5"

Ground 18 17 Output 6"

Ground 20 19 Output 7*

Ground 22 21 Clamp 8-11

Ground 24 23 Output 8*

Ground 26 25 Output 9*

Ground 28 27 Output 10*

Ground 30 29 Output 11 *

Ground 32 31 Clamp 12-15

Ground 34 33 Output 12*

Ground 36 35 Output 13"

Ground 38 37 Output 14*

Ground 40 39 Output 15*

User Connector Pin List

STD/7501 EDGE CONNECTOR PIN LIST

o

PIN NUMBER PIN NUMBER

OUTPUT (LSTTL DRIVE) OUTPUT (LSTTL DRIVE)

INPUT (LSTTL LOADS) INPUT (LSTTL LOADS)

MNEMONIC MNEMONIC

,') VOL TS vee 2 ¹ vee .:, VOL TS

t--- --

GROUND GNO 4 '3 GNO GROUND

·5V 6 ^') ·5\1

07 1 8 7 1 03

06 1 10 9 1 02

05 1 12 11 1 01

04 1 14 13 1 DO

A15 16 15 1 A7

A14 18 17 1 A6

A13 20 19 1 AS

Al:r- 22 21 1 A4

All 24 23 1 A3

Al0 26 25 1 A2

A9 28 27 1 A1

- - -

A8 30 29 1 AO

RO' 32 31 1 WR'

MEMRO' 34 33 1 IORO'

MEMEX' 36 35 1 IOEXP'

MCSYNC' 38 37 REFRESH'

STATUS 0' 40 39 STATUS l '

BUSRO' 42 41 BUSAK'

INTRO' 44 43 INTAK'

NMIRO' 46 45 WAITRO'

PBRESET' 48 47 1 SYSRESET'

CNTRl' 50 49 CLOCK'

PCI IN 52 51 OUT PCO

AUX GNO 54 53 AUX GNO

AUX -v 56 55 AUX -v

o

~

()

•

MECHANICAL SPECIFICATIONS

Refer to the Card Address Selection diagram for component placement information, When placed in a Series 7000 STO BUS card rack, the 7501 requires clearances of 0.150" on the circuit side and 0.600" on the component side of the printed circuit board. These clearances are required for the safety shields on the component side and the circuit side of the 7501.

User Mating Connector Information

The 7501 uses a 40-pin male PC board header connector (3M PN 3432-130 or equivalent). The matching female socket for use in standard flat cable applications is 3M PN 3417-6040.

ADDRESS SELECT

Sx ^090000000

000000000

SY ^900000000 _600000000

SZA 990000000 SZB

660000000

LED

CONNECTOR 40 PIN FLAT

l- I-

a: 2 ⁰ ..

;;

im

CABLE CONNECTOR 3M PN 3432-1002 OR EQUIVALENT

Card Address Selection

9

.W_-,--

SECTION 6

7501 OPERATING SUBROUTtNE MODULES

This section provides flow diagrams and suhroutines to oper~te your 7501 card. These may be used intact, or used as models to construct subroutines for a specific application.

The subroutines are written in 8080-fami1y assembly code and will execute on 8080, 8085, and z80 processors. The memory addresses selected are compatible with Pro"'Log's 7801 (8085A) and 7803 (z80) processor cards, The 7501 port addresses used are the address jumper selections made when the 7501 is sh i pped.

To use these subroutines in systems other than those described aboye~

the memory and/or I/O port addresses may requlre change for compatlb~ll'ty~

The I/O routines provided must be duplicated for the two ports on the 7561, The correct port address must be inserted in each routine~

The flow diagrams presented can be easily translated into the assembly code used by any microprocessor since they show the steps required to achieve 7501 operation without reference to a particular microprocessor.

o

The (Set Bit) routine can set a bit or bits on an output port. To use the routine, load the accumulator with the hits that should be changed and set the HL pointer to a place in memory where the port status is stored. Setting

a bit will cause the corresponding output driver to sink (conduct) currentp

0

The (Clear Bit) routine can clear a bit or bits on an output port. To use the routine, load the accumulator with the bits that should be changed and set the HL pointer to a place in memory where the port status is stored.

Clearing a bit will cause the corresponding output dirver to turn-off (not conduct current).

o

•

o

•

SET BITS

INPUT PRESENT STATUS

"OR^II IN NEW BITS

OUTPUT NEW STATUS

CLEAR BITS

"

INPUT PRESENT STATUS

"

MASK OFF UNWANTED BITS

OUTPUT NEW STATUS

"

RETURN

)

11

&&A NGiilWWilMIiiW.=_ ... 4i4liWUQU';W'=#II@ Ie i Z ; 4AM " " $ f4q '"

o

PRO-LOG CORPORATION PROGRAM ASSEMBLY FORM

HEXADECIMAL MNEMONIC

TITLE '156\ ^DATE

PAGE LINE

ADR ADR INSTR. LABEL INSTR. MODIFIER COMMENTS

0 L1)A-:t LOAl) A WIT~ ~r'(s.") T{) ~ <;.£\

1

-

2 lJ)~I \tL • SET MEMCN...'I '?Ol~"I£R

3 - '1...'1...

4 - XX

5 4'1 ^(ser ~\TS) .Lt>~ A .... 9.A-JE. ~\ TO; l ~ -0

6 7£ ^{LDA M(~L)} .-6e:-r Pe.£6£N"T "'aRT ^~A--n)5

7 ~o ORA ~ 4-0R t N N law -:B.l T,s

8 '-'1 STA~ (\\-LJ "-STDRE. ~EW PDQ.;:L !:>TA,.OS

9 l>~ CRt\ +~£~\D N~ W ~ ArTA. \ h PDQ... ' \

A _"!..~

-

B Cq RTS

C D

E

~~

F

0 LbA-I - LO~ A W\-n.\ '""&lTcS) 1'O_'OE ~Ef)

1 - )(~ r

2 L"D-P:r. - SET MF:MhQ..'1 PD\"-l\'BR

3

-

4

-

5 .:u: ((I-,~o.Q ~ r\S) rMA - CoM{)LE'M..eJT ~l'<" A.,..)D PI)\ IN "&

6 4-1 ^LD& A

7 1£ LDA ^{M (t-+L)} ... bE:T PP.k~I=A.)' {>()Q.., S-fA\US

8 f\o A-I\) A _.~ ... ~AS\O( dE "BlTS

9 _rot '1 51PtN (\-\L) .... ~::iTt)2..E NEw %Q..\ ~T~\I)S

A 1)'3 OPA

f

B 'J...'1.. - _X-'f...

C (lq A..\5

D E F

100001 2m

o

• ^{0 0}

C/)

t:'l1

("') t-j

6 5 4 3 2 H 0

8 7

~

DI ID

~

~ ~

/ ^/~'" ~

'<

I~~ ~=:l

3REQ ~~O

It

C ^'"1

U2

CI ^74LS273

JI~

~~

...

~-J

<>-{Hlli-o ~ 00

O'Q

~

00 III

~~ ~-n

~~ 00 00

~

~~ --J

^s

I::: ~"6600 00

BI I~ ~ o-ooID-<l

1/9 I/K,CF/I<f.W,5¥o I IV,2.)3)4 III

Dl3612

~ [IB I I rt

171 ^{470JL. NEn~1 RS'"} 7 8 ...

n

033, ..34,.35,3u.

/ \ ^1/4 I

B&

Z REa Bt:€Q

I DI7-D5e 1/1 I IN4148

&,-IDENTIFY WiTH "S:'YREv.LnTERU~INGRUI>I>ER:;T"MP.

& -APPLY LOCXTlTE. TO ALL SCfi:Ew5

& -INtI/CArts CATHaDf. PIN OF LLD f!rp)

£-^{LAd£LS ro BE PlA:~C ON 81JTH cotrJr f ClA.C. SIDe~} Of: PIAlI3 AS SU()WN

AI _&,-PO~T I 1.5 JUI1PCI> TO ADDJ:J.55 4/ A

I1::.-PO~T 0 IS IIIH/>El> TO AO{)KES~ 40

It:, -[NOI{ATE.S PIN N/J.I OF SOUETS (rr,) I -Foe AS5E"'~U ,STANOARD !.H. ASIQ0.4.

NOTES: UNLEt;S OTHE~1I15£ SPE.lJFI£D

~ 8 7 6 5 4 3

- L (...)

...

~

D7 ':"pq'S BU,Fe:: OIl? 1

'---1'174~~244 ^{9 006} 1

, \ - - - - - 1 1&

17-4>-!> OD3

1>1 S~

..

} - - - ; I : : ' (TYPl '7

..EQrrJL

+5V

PeU r;J OUTPUT CIRCUIT t5V

PORT I OUTPUT (I RCUIT .~v

~~OO2. .n

~' • (o,OP'-7-'

~-. (2.5

~~~QV7 ~ I~ I I

iOE)(Q*~ _ _ _

A7: 'T

A617 1+

8 ,,~~ S~ ~ loPO-s~~ 1 I 1 ^{(70PO-Sil IOPI-;;}

A5~9 IS A

50 'XO a~612_ I- ~ ^e61-r,\

I

--<~ DPI-oj. lUI::'):> - • (a9

L-(IO

+5V ~'... "0-' I ^{u, ~ +5V}

A+(~I '·C 55-'~ L_ ':I+ei'i+'l.'O"'. ~II L ",'i'··i'i+'lT<UL. ~"

A~:

!:~:~: ::3

^{~ ~DPO-3}

^U~b

^OPO-~

Ai:@ I _~ SJ~ _{- - T} ^I _~ ^-05 3J---.:..-1Z _{5 ~I} 01'1-5"1 r,H-~--t _O~H ^{r A} _{I I}

I

I

~.. LO+b4 •

IS OPO·2~ OP/~Z

AO@ ~A

PCO ®---,

PC 1 @---l _74L532

T5V~

I

II.Ol'F

1

:::~ ^{sov 50V}

~... (l90PO.,,"

, r

....ll

DPI-I

OPI-O

.2.L

"

ASSEMBLY 105135 PRO- LOG CORPORATION

PARTS LIST I051~6

[.<,

1Ml~

•

o

•

USER'S MANUAL

2411 Garden Road Monterey, California 93940

o

o

o