Data ﬂow in the Mu3e DAQ

(1)

Data flow in the Mu3e DAQ

Marius Köppel

Institut für Kernphysik

25.03.2019

(2)

1. Mu3e

Mu3e Motivation

SM with

ν

oscillation Br: < 10

⁻⁵⁴

• search for Lepton Flavor Violation µ ⁺ → e ⁺ e ⁻ e ⁺

• current limit (Br < 10 ⁻¹² ) set by SINDRUM (1988)

decay in rest

• muon beam of 10 ⁸ µ/s in one year

• sensitivity up to one in 10 ¹⁵

• very high data rate of

80 GBit/s

(3)

1. Mu3e

Mu3e Experiment

e ⁻

e ⁺ e ⁺

signal

e ⁻

e ⁺ e ⁺

random combinations

e ⁻

e ⁺ e ⁺

ν µ

ν e

internal conversion

• P p _e = 0

• P E _e = m _µ

• good vertex and time resolution

→ all selections need to be done online & no trigger

(4)

1. Mu3e

Mu3e Experiment

(5)

2. DAQ

DAQ Requirements

• no trigger

• online time sorting of the events

• muon stopping rate of 10 ⁸ µ/s

• around 10000 sensors

• total average rate of 43 Gbit/s per MuPix

(80,9 Gbit/s with fibers and tiles)

(6)

2. DAQ

DAQ

2844 Pixel Sensors 3072 Fibres 6272 Tiles

86 Front-End Boards 12 Front-End Boards 14 Front-End Boards

Front-end (inside magnet)

2 Switching Boards Switching Board Switching Board

PC connection board PC connection board PC connection board

Gaming PC Gaming PC Gaming PC

Data Collection Server Mass Storage 12 PCs

up to 45 x 1,25 Gbit/s LVDS links

1 x 6 Gbit/s link each

1 x 10 Gbit/s output link per board

4 x inputs each

PCIe connection

Gbit Ethernet

(7)

2. DAQ

DAQ

4 x inputs each

PCIe connection

Gbit Ethernet

(8)

2. DAQ

DAQ

4 x inputs each

PCIe connection

Gbit Ethernet

(9)

2. DAQ

DAQ

Data Collection Server Mass Storage

12 PCs up to 45 x 1,25 Gbit/s

LVDS links

4 x inputs each

PCIe connection

Gbit Ethernet

(10)

2. DAQ

DAQ

4 x inputs each

PCIe connection

Gbit Ethernet

(11)

2. DAQ

DAQ

4 x inputs each

PCIe connection

Gbit Ethernet

(12)

3. Integration and Tests

Front-End - Switching Board

4 x inputs each

PCIe connection

Gbit Ethernet

(13)

3. Integration and Tests

Front-End - Switching Board

Pixel Data Slow-Control

Data FIFOs Slow-Control FIFOs

State controller Data Merger Bit Error Test

Front-End Boards

Data Demerger Bit Error Test

Aligning Clock & Reset board

MIDAS ¹

Switching Board

1 MIDAS. . https://midas.triumf.ca. Accessed: 2019-03-23

(14)

3. Integration and Tests

Aligning on the Switching Board

4 x inputs each

PCIe connection

Gbit Ethernet

(15)

3. Integration and Tests

Aligning on the Switching Board

sorted data

...

FEB

₀₁

FEB

₀₂

FEB

₀₃

FEB

₀₄

...

... ...

FEB

₁₁

FEB

₁₂

FEB

₁₃

n bit x n MHZ

128 bit x 156,25 MHZ

32 bit x 156,25 MHZ

• expected data rate 40 Gbit/s

• aligning data from multiple Front-End Boards

(16)

3. Integration and Tests

PCIe-FPGA Speed Tests

4 x inputs each

PCIe connection

Gbit Ethernet

(17)

3. Integration and Tests

PCIe-FPGA Speed Tests

• 8 lines PCI Express 3.0

• sending data from PC connection board to a Graphics processing unit (GPU)

• data rate of 38,40 GBit/s was

tested

(18)

3. Integration and Tests

Test Setup

(19)

4. Conclusion & Outlook

Conclusion & Outlook

Conclusion

• connection Front-End → Switching Board

• sufficient data rate from PC connection board to GPU

• aligning algorithm on the Switching Board Outlook

• tests with the full data rate

• firmware for the PC connection board

(20)

5. Backup

Specifications

vertex and time resolution of 100 µm and 500 ps

(21)

Data ﬂow in the Mu3e DAQ

Data flow in the Mu3e DAQ

Marius Köppel

Institut für Kernphysik

25.03.2019

1. Mu3e

Mu3e Motivation

SM with

oscillation Br: < 10

• search for Lepton Flavor Violation µ + → e + e − e +

• current limit (Br < 10 −12 ) set by SINDRUM (1988)

decay in rest

• muon beam of 10 8 µ/s in one year

• sensitivity up to one in 10 15

• very high data rate of

80 GBit/s

1. Mu3e

Mu3e Experiment

e −

e + e +

signal

e −

e + e +

random combinations

e −

e + e +

ν µ

ν e

internal conversion

• P p e = 0

• P E e = m µ

• good vertex and time resolution

→ all selections need to be done online & no trigger

1. Mu3e

Mu3e Experiment

2. DAQ

DAQ Requirements

• no trigger

• online time sorting of the events

• muon stopping rate of 10 8 µ/s

• around 10000 sensors

• total average rate of 43 Gbit/s per MuPix

(80,9 Gbit/s with fibers and tiles)

2. DAQ

DAQ

2. DAQ

DAQ

2. DAQ

DAQ

2. DAQ

DAQ

2. DAQ

DAQ

2. DAQ

DAQ

3. Integration and Tests

Front-End - Switching Board

3. Integration and Tests

Front-End - Switching Board

Pixel Data Slow-Control

Data FIFOs Slow-Control FIFOs

State controller Data Merger Bit Error Test

Front-End Boards

Data Demerger Bit Error Test

Aligning Clock & Reset board

MIDAS 1

Switching Board

1 MIDAS. . https://midas.triumf.ca. Accessed: 2019-03-23

3. Integration and Tests

Aligning on the Switching Board

3. Integration and Tests

Aligning on the Switching Board

sorted data

...

...

FEB

FEB

FEB

FEB

...

• search for Lepton Flavor Violation µ ⁺ → e ⁺ e ⁻ e ⁺

• current limit (Br < 10 ⁻¹² ) set by SINDRUM (1988)

• muon beam of 10 ⁸ µ/s in one year

• sensitivity up to one in 10 ¹⁵

e ⁻

e ⁺ e ⁺

e ⁻

e ⁺ e ⁺

e ⁻

e ⁺ e ⁺

• P p _e = 0

• P E _e = m _µ

• muon stopping rate of 10 ⁸ µ/s

MIDAS ¹