TRANSMIT INTERRUPT PENDING 1

o 1

MODEM INTERRUPT CHANNEL #; - LSB

1

¹

---1---1---

₁

1 MODEM INTERRUPT CHANNEL i l l

---1---1---2 1 MODEM INTERRUPT CHANNEL #; - MSB 1 1

---1---1---

_{3 1} MODEM INTERRUPT PENDING 1 1

=====1======================================1======

4 1 RECEIVE INTERRUPT CHANNEL #; - LSB 1 1

---1--- ---

₅ RECEIVE INTERRUPT CHANNEL #; 1

6 RECEIVE INTERRUPT CHANNEL i - MSB 1

---7 RECEIVE INTERRUPT PENDING 1

=====

======================================

⁼⁼⁼⁼⁼⁼

8 TRANSMIT INTERRUPT CHANNEL #; - LSB 1 9 TRANSMIT INTERRUPT CHANNEL i 1 10 TRANSMIT INTERRUPT channel i - MSB 1

11 TRANSMIT INTERRUPT PENDING 1

--- ====================================== ---

---12 (not used) 1

13 (not used) 1

14 (not used) 1

--- ---1---

₁₅ (not used) 1 1

Table 4-38: SERIAL CONCBN'l'RA'l'OR III'I'ERRUPT VBC'.rOR REGISTER

The remaining registers (176 bytes) form eight sets of Channel Registers -- one set of registers for each of the channels on the Intelligent Concentrator Board. The first of the Channel Registers is the Channel Parameter Register. The Channel Parameter Register is a sixteen bit register used to establish the bit level characteristics of the channel. The definition of the bits is given in Table 4-31 on the next page. Most of these bits deal with the programming of the receiver-transmitter device and the baud rate generator device. One exceptions is bit seven.

SpecificatioD RevisioD 4.2, May 27, 1982 Page 73

PRBLlllIllARY 86 •• OSBR IIAIIOAL S~IO. 7. SYSDII SPBCS. base addresses are contained in Receive Buffer Address Register.

Again an interrupt is generated each time one or more characters

Table 4-31: SERIAL CONCENTRATOR CHARNEL PARAMETER RmISTER

Specification Revision 4.2, May 27, 1982 Page 74

PRBLIIlIRARY 8688 USER IlARUAL S~IOR 7. SYS~ SPECS. Table 4-32: SERIAL CONCENTRATOR STATUS REGISTER

The channel command register is an eight bit register used unchanged to continuously indicate the inter rupt enable sta tus.

The commands available are summarized in the following table.

Specification Revision 4.2, May 27, 1982 Page 75

PRBLllllBARY 8688 OSER IlAllUAL SBC'lION 7. SYSTBJI SPECS.

Reset modem interrupt request Modem interrupt enable

Receive interrupt enable Transmit interrupt enable Command valid

Table 4-33: SERIAL CONCENTRATOR CHANNEL COMMAND REGISTER

The Transmit Data Buffer Address Register is a 24-bit register containing the address of the data to be transmitted.

After transmit termination, this register will contain the address of the last character transmitted plus one. The number Receive Buffer Output Pointer Register. These pointers are both sixteen bit registers. The Input Pointer always points to the

PRBLIMIlIARY 8688 USER IWIOAL SECTION 7. SYSTEM SPECS.

The TTY receive register is an eight bit register used to receive data in applications not requiring multiple-byte ring buffering. In TTY receive mode, the byte is simply stored in the Channel TTY Receive Operation

Channel Ring Buffered Receive Operation Modem Control/Status Operation

After a power-up or controller hardware reset, the controller first initializes all hardware devices, then clears internal RAM, and finally waits in a tight loop. To activate the

PRELllllllARY 8688 OSER IIAROAL SEC~IOR 7. SYSTEM SPECS.

Increment "New Command Register"

Exit

Rote; channel status for a given channel is NOT valid while a command is pending.

After defining the desired operating parameters (i.e., paritYf word length, etc.), which must be stored into the channel parameter register, the channel may now be initialized with the

"Initialize Channel" command. Once this initialization command has been issued the channel is ready to transmit or receive. If generating Intelligent I/O Controller driver routines.

Specification Revision 4.2, May 27, 1982 Page 78

PRELIIlIIlARY 8611 USER IlAllUAL SBC'.rION 7. SYSTEIl SPECS.

Use the following procedure to transmit a block of data:

Test if last command still pending

<exit or loop if true>

Test if trans~itter ready

<exit or loop if false>

Set address and byte count Issue transmit command

Increment nNew Command Register n Exit

To receive a character in TTY mode, use the following procedure:

Test if last command still pending

<exit or loop if true>

Test if receive character available

<exit or loop if false>

Read status (test for errors) If Error

Else

Issue Reset Error command

Increment nNew Command Register n Exit

Read character from TTY register Issue Receiver Ack command

Increment nNew Command Register n Exit

Specification Revision 4.2, May 27, 1982 Page 79

PRBLIIIIlIARY 8' •• OSSR 1IA1IOAr. SBClIOB 7 .SYS'.rBII SPECS.

The following procedure should be used to receive a character in Ring Buffered Receive mode:

Test if last command still pending

<exit or loop if true> . Test if receive character available

<exit or loop if false>

Read status (test for errors) If Error

Else

Issue Reset Error command

Increment nNew Command Register n Exit

Transfer Characters

Issue Receiver Ack command

Increment nNew Command Register n Exit

Transfer Characters:

While (Input Pointer) >< (Output Pointer) Do

{ TTYInputRoutine <- «BufferAddress)+(OutputPointeI (OutputPointer) <- (OutputPointer)+I;

If (OutputPointer)

=

(BufferLength) Then (OutputPointer) <- B;

Issue Reset Modem Interrupt command Increment "New Command Registerⁿ Exit

4.8. Magnetic Tape Controller.

An optional magnetic tape drive controller which is capable

PRBLIIIDIARY 86.. USER- IIAIIOAL SBC.rIOR 7. SYS'lB1I SPECS.

must be programmed to operate in synchronous mode. The data channel is assigned to I/O por t IiJD8 hex while th e control channel for the 8274 is assigned to I/O port IiJDC hex.

Tape motion, drive select and track select is performed through the 8255. Port A of the 8255 is assigned to I/O address IiJD9 hex and is used to select the drive and track. Table 4-34 describes the meanings of the bits in this port. Notice that the bits have been assigned to the port to permit each four bit nibble to contain the true binary value for the drive or track to be selected. The DEI tape transport numbers drives from one to eight and tracks from one to four. Port B is assigned to I/O port address IiJDB hex and is used to read the status of the tape transport. These bits are summarized in Table 4-35 on the next page. Port C is assigned to I/O port address IiJDD hex and is used to control tape motion. These bits are listed in Table 4-36 also on the next page. The I/O port initialization routine initializes the 8255 by writing 1iJ82 hex to the 8255 control port which is assigned I/O address IiJDF hex.

BIT BIT NAME TRUE

IiJ LSB OF TACK NUMBER 1

1 BIT OF TACK NUMBER 1

2 MSB OF TACK NUMBER 1

3 not used

4 LSB OF DRIVE SELECT NUMBER 1

Im Dokument Computer System ACS8600 (Seite 137-145)