The PIO contains two 8-bit ports, A and B. Each port contains An 8-bit output register.
An 8-bit input register.
CHAPTER 1· GENERAL PROGRAMMING METHODS
59
A 2-bit mode control register, which indicates whether the port is in an output, input, bidirectional, or control mode.
· An 8-bit input/ output control register, which determines whether the correspond-ing data pins are inputs (1) or outputs (0) in the control mode.
· Two control lines (STB and RDY) that can be used for handshaking signals (the contents of the mode control register determine how these lines operate).
· An interrupt enable bit.
· A 2-bit mask control register (used only in the control mode) that determines the active polarity of the inputs and whether they will be logically ANDed or ORed to form an interrupt signal.
· An 8-bit mask register (used only in the control mode) that determines which port lines will be monitored to form the interrupt signal.
· An 8-bit vector address register used with the interrupt system.
Here, the important points are the input and output registers, the mode control register, the input/ output control register, and the control lines. The interrupt-related features of the PIO are discussed in Z80 Assembly Language Programming. 14
The meanings of the bits in the various control and mask registers are related to the underlying hardware and are entirely arbitrary as far as the programmer is concerned.
Tables are provided here and in Appendix B for looking them up.
Each PIO occupies four input port addresses and four output port addresses. The B/ A SEL (Port B or A select) and Cj D SEL (Control or Data select) lines choose one of the four ports as described in Table 1-10. Most often, designers attach address line Ao to B/ A SEL and Al to Cj D SEL. The PIO then occupies the four consecutive port addresses given in the last column of Table 1-10.
Clearly, there are far more internal control registers than there are port addresses available. In fact, all the control registers for each port occupy one address determined
Table 1·10. PIO Addresses
Control or Port B or A Register Port Address (Starting
Data select Select Addressed with PIOADD)
0 0 Data Register A PIOADD
0 I Data Register B PIOADD+I
I 0 Control A PIOADD+2
I I Control B PIOADD+3
The port addresses assume that C; D SEL is tied to Al and Bj A SEL to Ao.
60
Z80 ASSEMBLY LANGUAGE SUBROUTINESTable 1·11. Addressing of PIO Control Registers
Register Addressing
Mode Control D3 = D2 = Dj = Do = I
Input/ Output Control Next byte after port placed in mode 3 Mask Control Register D3 = 0, D2 = Dj = Do = I
Interrupt Mask Register N ext byte after mask control register accessed with D4= I Interrupt Enable D3 = D2 = 0, Dj = Do = I
Interrupt Vector Do= I
by the C/O SEL connection. Thus, some of the data bits sent to a control register are actually used for addressing. Note the following situations (see Table 1-11):
· If Do = 0, the remaining data bits are loaded into the interrupt vector register.
· If 03= Oand 02= 01 = 00= I, the remaining data bits are loaded into the mask control register. If 04
=
I, the next control byte is loaded into the interrupt mask register. Interrupts can be enabled (07 = I) or disabled (07 = 0) with 03 = 02 = 0, 0 1 = 00= 1.· If 03,02,01, and Do are alII's, the remaining data bits are loaded into the mode control register. If 07 = 06 = 1 (that is, the port has been placed in the control mode), the next control byte is loaded into the input/ output control register.
This sharing of an external address means
· The programmer must be careful to specify the proper addresses, data values, ancl order of operations. The actual destination of an OUT instruction directed to a PIO control address depends on the data value and may also depend on the OUT instruc-tion that preceded it.
· The programmer should document the PIO initialization in detail. The device is complex, and a reader cannot be expected to understand the initializing sequence.
The control registers of the PIO are usually initialized only in an overall startup routine. Other routines typically refer only to the PIO input and output registers. Since all of its control registers share a port address, a repeated block output instruction (OTIR or OTOR) can be used to initialize a PI~. No timing problem occurs, since the PIO operates at the same speed as the CPU. Chapter 10 contains an example showing the use of repeated block output instructions to initialize PIOs and other peripheral chips.
CHAPTER 1 GENERAL PROGRAMMING METHODS
61 PIO Operating Modes
A startup program selects the operating mode of a PIO port by writing a control byte to the PIO in the form shown in Figure 1-10. The lower table in Figure 1-10 describes the operating modes and their associated control bytes. Note that only bits 6 (Mo) and 7 (MI) affect the operating mode; bits 4 and 5 are not used and bits 0 through 3 are used for addressing. When power is turned on, the PIO comes up in mode I (input). The modes may be summarized as follows:
. Mode 0 - Output (bit 7 = bit 6 = 0)
Writing data into the port's output register latches the data and causes it to appear on the port's data bus. The Ready (ROY) line goes high to indicate Data Ready; it remains high until the peripheral sends a rising edge (a O-to-l or low-to-high transition) on the Strobe (STB) line to indicate Data Accepted or Device Ready. The rising edge of STB causes an interrupt if the interrupt is enabled .
. Mode 1- Input (bit 7
=
0, bit 6=
I)The peripheral latches data into the port's input register using the Strobe signal. The rising edge of STB causes an interrupt (if enabled) and deactivates ROY (makes it 0).
When the CPU reads the data, ROY goes high to indicate Data Accepted or Input Register Empty. Note that the peripheral can strobe data into the register regardless of the state of ROY. The programmer is therefore responsible for guarding against overrun (new data being placed in the register before the CPU has read the old data).
Set Mode
Ml MO Mode
0 0 Output
0 I Input
I 0 Bidirectional
I I Bit Control
PIO Meaning Control Byte
Mode (Binary) (Hex)
0 Output 00001111 OF
I Input 01001ll1 4F
2 Bidirectional 10001ll1 8F
3 Control 1I001111 CF
Note that bits 4 and 5 are not used and could have any values.
Figure 1·10. Mode control for the Z80 PIO
If a port is placed in mode 3. the next byte sets the I/O control register:
1/0= I Sets bit to Input 1/0= 0 Sets bit to Output
62
Z80 ASSEMBLY LANGUAGE SUBROUTINES· Mode 2 - Bidirectional (bit 7
=
1, bit 6=
0)Since this mode uses all four handshake lines, it is allowed only on port A. The port A RDY and STB signals are used for output control and the port B RDY and STB signals are used for input control. The only difference between this mode and a combination of modes 0 and 1 is that data from the port A Output register is enabled onto the port's data bus only when A STB is active. This allows the port A bus to be used bidirectionally under the control of A STB (Output Data Request) and B STB (Input Data Available). Note that operations on input register A govern port B's control signals in this mode.
· Mode 3-Control (bit 7 = 1, bit 6 = 1)
This mode does not use the RDY and STB signals. It is intended for status and control applications in which each bit has an individual meaning. When mode 3 is selected, the next control byte sent to the PIO defines the directions of the port's bus lines. A 1 in a bit position makes the corresponding bus line an input, whereas a 0 makes it an output.
Note the following features of the PIO's operating modes:
· In modes 0, 1, and 2, the peripheral indicates Data Ready, Device Ready, or Data Accepted with a rising edge on the STB line. This edge also causes an interrupt if the interrupt is enabled.
· In modes 0, 1, and 2, the PIO indicates Data Ready, Input Buffer Empty, or Data Accepted by sending RDY high. This signal remains high until the next rising edge on STB.
• The bidirectional mode (mode 2) applies only to port A, and port B must be placed in mode 3 (control) since all the handshaking lines are already committed.
· The input/ output control register is used only in the control mode (mode 3).
Otherwise, the entire 8-bit port is used for either input or output.
· There is no way for the processor to determine if a pulse has occurred on STB if interrupts are not being used. The PIO is designed for use in interrupt-driven systems rather than in programmed I/O systems. STB should be tied low if it is not being used.
· The processor cannot control the RDY lines directly. The RDY line on a port goes high when data is transferred to or from the port and goes low on the rising edge of STB.
· The contents of the output register can be read if the port is in the output or bidirectional mode. If the port is in the control mode, the output register data from the lines assigned as outputs can be read. The contents of control registers cannot be read.
If a program needs to know their contents, it must save copies in RAM of the values stored there.
· If the RDY output is tied to the STB input on a port in the output mode, RDY will go high for one clock period after each output operation. This brief pulse can be used to multiplex displays.
CHAPTER 1: GENERAL PROGRAMMING METHODS