converter
Fig. 4.12.12 Circuit diagram of A/D converter
This A/D converter performs A/D conversion according to the following three sequences.
• Auto zero adjustment period
• Input integration period
• Reference voltage reverse integration period
The respective periods become as shown in Table 4.12.3 when software (setting of register ADRS1 and ADRS0) is used to set the resolution and conversion time.
Table 4.12.3
Conversion time Auto zero Input Reverse Total
adjustment integration integration time 0 0 6,552 counts 200 msec 100 msec 200 msec 500 msec 0 1 3,276 counts 100 msec 50 msec 100 msec 250 msec 1 0 1,638 counts 50 msec 25 msec 50 msec 125 msec 1 1 820 counts 25 msec 12.5 msec 25 msec 62.5 msec ADRS1 ADRS0 Resolution
Here below is provided an explanation of the operations in the respective period. Refer to Figure 4.12.13 for the output waveforms of each operational amplifier.
+ –BUF -VR
VR VIN
GND
+ –
+ –
CAZ CI
BF
INT
CMP GND
S1
RI
S2
S3 CO
To A/D converter control circuit
CHAPTER 4: PERIPHERAL CIRCUITS AND OPERATION (A/D Converter)
• Positive input voltage
Buffer AMP output voltage Integral AMP output Comparator output
GND
GND
GND
Auto zero adjustment
Input integration
Reverse integration
Auto zero adjustment
*2
*1
*1: This voltage is proportional to input
*2: Time is proportional to input voltage
*3: The gradient is fixed
*3
• Negative input voltage
Buffer AMP output voltage Integral AMP output Comparator output
GND
GND
Auto zero adjustment
Input integration
Reverse integration
Auto zero adjustment
GND
Input integration period
When the auto zero adjustment period terminates, start the inte-gration of the input voltage by connecting switch S1 to the VIN side and turning switches S2 and S3 OFF. The input voltage of the integral AMP changes according to the time constant of the integral resistance RI and the condenser CI, and the waveform that indi-cated in Figure 4.12.13 is output by the integral AMP.
(2)
Auto zero adjustment period
Auto zero adjustment is the sequence initially effected in order to compensate for error in the A/D conversion results, due to the offset voltage of the buffer AMP (BUF), the integral AMP (INT) and comparator (CMP).
The switch S1 in Figure 4.12.12 is connected on the GND at the beginning of this period and switches S2 and S3 go ON.
Then switch S2 goes OFF, and voltage is charged into CAZ to correct the offset.
The auto zero adjustment period becomes the time counted for only the number of resolution counts that have specified the 32 kHz clock.
(1)
Fig. 4.12.13 Output waveform at the time A/D conversion
CHAPTER 4: PERIPHERAL CIRCUITS AND OPERATION (A/D Converter)
The slope of this integral output waveform changes in proportion to the input voltage. The portion charged into the CAZ due to the previous auto zero adjustment is added to the input voltage of the integral AMP and negates the offset voltage. The input integration period becomes the time that has been counted for only 1/2 the number resolution counts that have specified the 32 kHz clock.
The integral AMP output voltage Vint at the point where this time has elapsed is indicated by the following expression.
Vint = -VIN * (N * T / CI * RI) (Expression 4.12.1) VIN: Input voltage
N: 1/2 of the resolution (count number) specified by the software
Resolution N
6,552 3,276
3,276 1,638
1,638 819
820 410
T: OSC1 clock cycle 1/32,768 (sec) CI: Integrating capacity
RI: Integrating resistance
(3) Reference voltage reverse integration period
When the input integration period is completed, the reference voltage causes it to shift to the reverse integration period. The switch S1 is connected to the VR or -VR side and switches S2 and S3 go OFF.
The side of opposite polarity to the input voltage that effected the integration in step (2) is selected for the polarity of the reference voltage VR.
• When the input voltage VIN is positive: Switch S1 connects to the -VR side
• When the input voltage VIN is negative: Switch S1 connects to the VR side For this purpose, the polarity of the input voltage is checked by a comparator for the input integration period, and which of the polarities to be used is selected in advance.
At the same time as it begins the reverse integration by the refer-ence voltage, the dual slope counter begins the count-up by the 32 kHz clock. The content of this counter is reset to the input integra-tion period and hence counts up from "0".
Reverse integration continues until the comparator detects that the output of the integral AMP has become "0" and at that point the dual slope counter stops, then shifts to the next A/D conversion
CHAPTER 4: PERIPHERAL CIRCUITS AND OPERATION (A/D Converter)
Since the slope of the reverse integral waveform is fixed, the coun-ter value according to the integral result of the input voltage in step (2) is obtained from the dual slope counter. The counter value n at this time is indicated by the following expression.
0 = Vint - (-VR * n * T / CI * RI) (Expression 4.12.2)
According to Expression 4.12.1 and Expression 4.12.2, it becomes n = VIN * N / VR (Expression 4.12.3)
The value of the input voltage is determined by reading and processing this value using software.
VIN = n * VR / N (Expression 4.12.4)
The reference voltage reverse integration period shown in Table 4.12.3 is the time for counting the full scale and, actually, the A/D conversions is completed at the point where the output of the integral AMP has become "0".
(4) Circuit related differences due to measurement items The A/D conversion sequence does not differ depending on the items selected. It responds to the respective selected items by partially changing over the circuit.
• Voltage measurement mode
For voltage measurement, the GND level is added to the non-inverted input of the integral AMP and the specified analog input is A/D converted as opposite the GND level.
VR2 is used for the reference voltage VR. (Calculate as VR = 163.8 mV.)
• Differential voltage measurement mode
For differential voltage measurement, the input level of AI0 (for AI1–AI0 measurement) or the input level of AI2 (for AI3–AI2 meas-urement) is added to the non-inverted input of the integral AMP and the specified analog input of AI1 or AI3 is respectively A/D converted as the opposite AI0 or opposite AI2 level.
VR2 is used for the reference voltage VR. (Calculate as VR = 163.8 mV.)
Fig. 4.12.14 Circuit diagram at the time of differential voltage measurement
+ –BUF -VR
VR VIN
GND
+ –
+ –
CAZ CI
BF
INT CMP
S1
RI
S2
S3 CO
AI0(AI2) AI1(AI3)
VR = -VR2 To A/D converter
control circuit
CHAPTER 4: PERIPHERAL CIRCUITS AND OPERATION (A/D Converter)
+ –BUF
+ –
+ –
CAZ CI
BF
INT CMP
GND S1
RI
S2
CO AI2(AI3)
-VR VR VIN
GND VR = -VRref
Thermistor
To A/D converter control circuit Rref
• Resistance measurement mode
At the time of resistance measurement, the non-inverted input of the integral AMP is set to the GND level.
As shown in Figure 4.12.15, a voltage drop of the reference resist-ance is obtained as the reference voltage at the time of resistresist-ance measurement by impressing a VR1 voltage from the AI4 terminal onto the reference resistance connected between the AI4–AI3 (or AI2) terminals. You can obtain an A/D conversion value according to the resistance value by A/D conversion of the voltage generated by the measured resistance connected between AI3 (or AI2) and GND, using the reference voltage generated by the reference resist-ance, VR.
For this reason, even when the resistance value of the measured resistance has been changed to the maximum/minimum, you should adjust the resistance, such that the voltage that is input into the A/D converter does not exceed ±320 mV (GND reference).
When using an internally generated VR1, a resistance should be used such that the resistance variation range is within a
maximum:minimum of 4:1 and this condition is met by setting the reference resistance at 1/2 of the resistance variation range of the measured resistance.
However, you should configure the circuit such that the reference resistance becomes 1 kΩ to 1 MΩ. Also be careful of these condi-tions when externally impressing VR1.
When the measured resistance has been made R and the reference resistance has been made Rref, the voltage VIN input into the A/D converter and the reference voltage VR are expressed by the follow-ing expressions.
VIN = VR1 * R / (R + Rref) (Expression 4.12.5) VR = VR1 * Rref / (R + Rref) (Expression 4.12.6)
According to the Expressions 4.12.4, 4.12.5 and 4.12.6, it becomes R = n * Rref / N (Expression 4.12.7)
CHAPTER 4: PERIPHERAL CIRCUITS AND OPERATION (A/D Converter)
Here we will explain about the control and interrupt of the A/D conversion and reading of data.
Before beginning A/D conversion, it is necessary to set the analog input terminal and measurement items explained previously and set the reference voltage generation circuit and middle electric potential generation circuit.