11.2 TDC calibration
11.2.2 Memory-cell Offset P i,j,k of f
102 11. Time measurement with the Spiroc2b
11.2 TDC calibration 103
possible trigger hit (3000 bins) prevents noise from a validation gap at the end of the ramps.
The resulting TDC spectra is homogeneously distributed over the range of 1000-2000 TDC bins. Figure 11.12 shows an obtained hit time spectrum after the ramp correction and the cuts discussed above for one cell. The mean is taken as the offset for this specific memory-cell around±100 ns of the main peak. An even distribution over all TDC bins ensures that any effects of non-linearity are evened out over the whole range of the TDC. Due to the nature of an electromagnetic shower, it is not possible to cut on the number of triggers per chip to exclude the pedestal shift effect in 11.2.4. For the extraction of the memory-cell offset, this effect is ignored and is later corrected. Following cuts on the trigger channel have been
Energy [ADC]
0 1000 2000 3000 4000
count
0 50 100 150 200 250
Time [TDC]
1000 2000 3000
count
0 20 40 60 80 100 120
Figure 11.10: Cuts on the ADC and TDC spectra of one channel. All trigger cuts for the trigger used in equation 11.4 already implemented in the green curves. Full cuts on the channel data from equation 11.5 result in the black curves.
Left: The ADC spectra is cut in a narrow 100 bin window around the main peak of the energy contributions to excluded any time walk effects.
Right:: TDC spectra in green with trigger cuts only. The SiPM noise in the validate event dead time is visible as the peaks at the right end of the spectra. In black the TDC spectra with the cuts from equation 11.4 and 11.5 to excluded noise and hits that can not have a corresponding trigger in the same cycle. The histogram is scaled 6 times higher to demonstrate the difference.
(chip 141, channel 9)
implemented. The cut on the ADC value of the trigger as shown in Figure 11.5. Only the middle part of the TDC ramp is considered to avoid non linearities and effects at the end of the ramp
Trigger channel:
ADC >500 1500< T DC <3000
(11.4)
To avoid the time walk effect only a small range in the ADC of the data channels are con-sidered. Also the same TDC cuts apply as for the trigger channel. Because of the delay time of the trigger electronics (Figure 11.9 on the left) no data is expected after a TDC value of
104 11. Time measurement with the Spiroc2b
2500.
Data channel:
M P V −100< ADC < M P V + 100 1500< T DC <2500
(11.5)
574 channels (two already calibrated trigger channels) with 9184 memory-cells (16 each) need
0
[ns]
Hit
-T T
−1000 0 1000 2000
count
1 10 102
103
Figure 11.11: Time difference to the trigger for one memory-cell (3) of one channel (141/5). The time difference for one memory-cell with all cuts from equation 11.3 applied is shown in a broad range. Apart from the main peak the revolution frequency of the DESY II test beam of 1 MHz (1µs) is visible.
Channel 141/5/3 Entries 1528 Mean −127.5 RMS 4.883
0
[ns]
Hit
-T T
−160 −140 −120 −100 −80
count
0 20 40 60
Channel 141/5/3 Entries 1528 Mean −127.5 RMS 4.883
Figure 11.12: Zoom into Figure 11.11 in the range close to the time reference. A Gaussian fit in red underlines the even distribution in time. The mean is written into a database as the memory-cell offset for this specific cell.
an individual calibration offset. The first memory-cell has no ADC information and is ignored,
11.2 TDC calibration 105
leaving 8610 constants. Several channels were broken or had to be deactivated during the test beam campaign due to high noise. Remaining high noise channels can prohibit the last memory-cells to be filled with any event. Data for 7994 memory-cells was available. All hit times after ramp correction are plotted per memory-cell (9216 in total) into a histogram and the mean is taken as the memory-cell offset correction. Memory cells with a RMS over 10 ns are regarded as broken and excluded from the analysis. Figure 11.13 shows the memory-cell offset over the TDC range and one broken cell (129/35/5) that is excluded from the analysis.
The amount of entries obtained per cell is in Figure 11.14 on the left. Memory cells with less than 100 entries were excluded from calibration to avoid deterioration of the time resolution of the whole detector due to the error on the offset of a few cells. On the right is the distribution of RMS for all memory-cells. Cells with an RMS value over 10 ns are considered to behave non typical and broken. 7519 Memory cells (87 % of all possible cells) passed all criteria and were calibrated.
Time [ns]
0 1000 2000 3000
TDC[ns]-Time[ns]
−20
−10 0 10
Memory Cell 5 Memory Cell 1 Memory Cell 3
Figure 11.13: Example of a broken memory-cell. This plot is produced with the data of the previous section on one of the electronically calibrated channels (129/35). Memory cell five is clearly broken not showing a constant offset but a slope. IfT DC[ns]−T ime[ns] is histogramed it will result in a larger RMS than non broken channels (Cell 1:1.74 ns, cell 3:1.73, cell 5:3.38 ns).
All offsets can be seen in Figure 11.15. The external time reference signal shows a mean offset of 142 ns from the signals of the SiPMs. Differences of 100 ns exist between memory-cells with a RMS of 14.8 ns. Not correcting the memory-cell offset would lead to a resolution worsened by 15 ns.
106 11. Time measurement with the Spiroc2b
Entries per memory cell
102 103 104
count
0 5 10 15
entries Entries 8027
Mean 7.509
RMS 1.366
Memcell
5 10 RMS15
count
1 10 102
entries Entries 7519
Mean 7.509
RMS 1.366
Figure 11.14:
Left: Available entries per memory-cell for calibration. Cells with less than 100 entries are discharged as indicated by the green line.
Right:: RMS for each memory-cell. As seen in Figure 11.13, some memory-cells show a non-constant behavior over the TDC range and result in a larger RMS of THit. Cells with an RMS over 10 ns are discharged. Green lines indicate the cuts.
Mean 142.4 ± 0.1647 RMS 14.69 ± 0.1164
Memory cell
[ns]
Offset
50 100 150 200 250
count
0 50 100
150 Mean 142.4 ± 0.1647
RMS 14.69 ± 0.1164
Figure 11.15: Calibration offsets for all memory-cells. The mean of the offset of each memory-cell from the electron test beam data is taken. The mean offset of 142 ns is the trigger delay due to the trigger electronics.