PERIPHERAL DEVICE
3.3 GENERAL INPUT/OUTPUT INSTRUCTIONS .1 General
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3.3 GENERAL INPUT/OUTPUT INSTRUCTIONS 3.3.1 General
The General I/O instructions are those instructions which are used for single word or single byte data nnoves, and for general conditioning and interrogation of peripheral
•
interfaces. These instructions may be used to load or read data buffers in an interface, trigger control flip flops or relays, sense the state of a flip flop or incoming line, and other similar functions.
3.3 .1.1 Instruction Types. The instructions in the' General I/O group are these:
1. Sense. Sense instructions are used to test certain conditions in the peripheral interfaces and per-form conditional branches on the results of the tests.
2. Select. Select instructions are used to condition peripheral interfaces to perform certain functions other than data transfer. These instructions may be used to set control flip flops, set interrupt masks, reset the interface, etc. The functions that are performed by the Select instructions are
determined by the design of the individual peripheral interfaces.
3. Input. There are several types of input instructions in this group. However, all of the input instructions in this group read data from the peripheral interface to either the A or X register in the computer. Data may be read either as full 16-bit words or as 8-bit bytes. Inputs may be masked so that only certain bits are recognized. Inputs may be unconditional, or they may be combined with Sense functions to read data upon a sense response.
4. Output. Output instructions move data from either the A or X register in the computer to the peripheral interface. Outputs may be unconditional, or they may be combined with sense functions to output data only upon a sense response.
3.3.1.2 Instruction Format. Figure 3-5 illustrates the format of the General I/O instruction group. Bits 14 and 15 identify the instruction as being part of the I/O class. Bits 8-13 define the specific instruction within the class. Bits 0-7 are arbitrarily divided into a Device Address in bits 3-7, and a Function
If the Device Address is considered to be contained in bits 3-7 and the Function Code in bits 0-2, each instruction may address up to 32 different devices and have up to 8 different functions specified with each address. When an instruction is executed, a signal is sent from the computer to the peripheral interface to tell the interface what type of instruction is being executed. The functions that will be performed by the peripheral interface are determined by both the function code and the type of instruction that is being executed. For example, a function code of
"4", when used with a Select instruction, may cause the interface to turn on a particular control flip flop. The same function code, when used with a Sense instruction may test to see if that control flip flop is turned on. The same function code, when used with an Input instruction may gate a certain set of lines to the Data Bus. Therefore, each function code may not have just one meaning. It may have a different meaning for each type of instruction with which it is used.
The division of bits 0- 7 into a Device Address and Function Code is purely an arbitrary division. The user may wish to consider all eight bits as a single Device Address field, with each function within a device having a separate address. If this convention is used, the computer may be considered to have the capability of addressing up to 256 different devices.
3.3.1.3 Description Format. The instruction descriptions which follow use the same general format as that used for Memory Reference instructions. Variations in the descrip-tion format are:
1. Instruction Diagram. Bit 9 of the Input and Out-put instructions contains the letter R. Since data transfers are made between the peripheral interface and either the A or X register for the General I/O instructions, bit 9 specifies Which computer register takes part in the transfer. The identifica-tion is:
R=O, A Register
16 14 13 12 11 10 9
Field Class
OP CODE
Bits
DEVICE ADDRESS
Description
14, 15 These bits define the I/O instruc-tion class.
Operation Code 8-13 These bits identify the specific I/O instruction that is being executed.
Device Address *3-7
Function Code *0-2
Used to select the specific peripheral device which is to respond to the I/O instruction.
Specified the function which the peripheral device is to perform.
May also be used to identify a data source within the interface, or a status that is beingsensed.
*The Device Address and Function Code fields may be com-bined into a single Device Address field, where each func-tion within a device has a separate address.
Figure 3-5. General Input/Output Instruction Format
2. Machine Codes. The Machine Codes section shows the possible hexadecimal codes that may be used in the two upper positions, and the letters "nn" in the two lower positions. The letters "nn" stand for the variable Device Address and Function Code fields which are determined by the device with which the instruction is used.
3.3.2 Sense Instructions
The Sense and Skip instructions allow the ALPHA 16 and NAKED MINI 16 computers to sense the state of a specified function in a peripheral interface and execute a conditional skip depending on the result of the test. There are two
instructions in this group. One causes a skip on a true response, and the other causes a skip on a false response.
3.3.2.1
SEN SENSE AND SKIP ON RESPONSE
16 14 13 12 11 10
I REGISTER
DEVICE ADDRESS
Tests the specified function in the specified device. If a true response is obtained, a one-place skip is executed. If a false response is obtained, the next instruction in sequence is executed.
Machine Codes:
:49nn
Registers Affected:
P Incremented normally if a false response obtained:
(P)+I-P.
Incremented twice if a true response obtained:
(P)+2-P.
Timing: 1 1/4 3.3.2.2
SSN SENSE AND SKIP ON NO RESPONSE
16 14 13 12 11 10
I REGISTER
DEVICE ADDRESS
Tests the specified function in the addressed device. If a false response is obtained, a one-place skip is executed. If a true response is obtained, the next instruction in sequence is executed.
Machine Codes:
:48nn
Registers Affected:
P Incremented normally if a true response is obtained:
(P)+I-P.
Incremented twice if a false response is obtained:
(P)+2-P.
Timing: 1 1/4
3.3.3 Select Instructions
Select instructions are used to set up conditions in a periph-eral interface which will cause the periphperiph-eral device to per-form some specified function. Select instructions are sometimes called "External Control" instructions because they are used primarily for control functions rather than data transfer functions.
There are two basic instructions in the Select group. One instruction presents a Device Address and Function Code to the peripheral interface along with a control signal stating that the instruction being executed is a Select instruction.
The peripheral interface examines the Device Address, Function Code, and control signal to determine what func-tion is to be performed.
The other instruction in this group does exactly the same thing, but in addition it places the contents of either the A or X register on the Data Bus. The peripheral interface then examines the Device Address, Function Code, control signals, and Data Bus to determine what functions are to be performed.
3.3.3.1 SEL
15 14 13 12 11 10
SELECT FUNCTION I REGISTER
DEVICE ADDRESS
The Function Code is transmitted to the addressed device along with a Select Control signal. The actual function per-formed within the device is a function of interface design.
Machine Codes:
:40nn
Registers Mfected:
None in the computer.
Timing: 1 1/4 3.3.3.2
SEA SELECT AND PRESENT A
SEX SELECT AND PRESENT X
15 14 13 12 11 10
DEVICE ADDRESS
The Function Code is transmitted to the addressed device interface with control signals. In addition, the contents of either the A or X register are placed on the I/O data bus.
Machine Codes:
:44nn :46nn
Registers Mfected:
None in the computer.
Timing: 1 1/4
SEA SEX
3.3.4 Input to Register Instructions
The Input to Register group of instructions cause data to be moved from a peripheral interface or device to either the A or X register of the computer. Input instructions may input either full 16-bit words or 8-bit bytes. If a byte input instruction is used, the byte is read into the lower half of
the receiving register without affecting the upper half of the register.
Inputs may be unconditional, or may be conditioned on sense response. Unconditional inputs read the specified data source within the peripheral device regardless of the conditions existing in the device. Inputs conditioned on sense response sense a specified condition in the peripheral device and input on a true response. If a true response is not received, the computer repeats the input instruction.
The computer effectively "hangs" on the input instruction until a true response is received. Input instructions which are conditioned by a sense response are interruptable; i.e., if an external interrupt is received while the computer is executing an instruction which inputs on a true response, the computer will recognize the interrupt at the end of the test and, if the input was not accomplished (a true response was not received), the computer will return to the execution of the input instruction after the interrupt is processed.
Inputs may be made directly to the receiving register, or may be ANDed with the contents of the receiving register with the results of the AND operation replacing the
original contents of the register. ANDing the input data with the contents of the receiving register is called a Masked input.
For masked word inputs, the input data is ANDed with the full 16 bits of the receiving register. For masked byte inputs, the input data is ANDed with the lower half of the receiving register and the upper half of the receiving register is unchanged.
3.3.4.1
INA INPUT TO A REGISTER (UNCONDITIONALLY) INX INPUT TO X REGISTER (UNCONDITIONALLY)
I REGISTER
15 14 13 12 11 10
DEVICE ADDRESS
Unconditionally inputs a full 16-bit word from the addressed device to the A or X register. The previous contents of the selected receiving register are lost. (The source of data in the addressed device may be specified by the function code.)
Machine Codes:
:58nn INA :5Ann INX Registers Affected:
AorX Previous contents replaced by input word.
Timing: 1 1/4 3.3.4.2
IBA INPUT BYTE TO A REGISTER (UNCONDITIONALLY) IBX INPUT BYTE TO X REGISTER (UNCONDITIONALLY)
I REGISTER
16 14 13 12 11 10
DEVICE ADDRESS
Unconditionally inputs an 8-bit byte from the addressed device to the lower half of the selected re.:;eiving register.
The upper half of the receiving register is unchanged. (The source of the data in the addressed device may be specified by the function code.)
Machine Codes:
:78nn IBA : 7 Ann IBX Registers Affected:
Aor X Previous contents of lower half replaced by input byte.
Timing: 1 1/4
3.3.4.3 INAM
INXM
MASKED [NPUT TO A REGISTER (UNCONDITIONALLY)
MASKED INPUT TO X REGISTER (UNCONDITIONALLY)
I REGISTER
16 14 13 12 11 10 9
DEVICE ADDRESS
Inputs a full 16-bit word from the addressed device. The incoming word is logically ANDed with the contents of the selected receiving register, and the results are stored in the selected receiving register:
(Input word) 1\ (A)-A or
(Input word) 1\ (X)-X
This instruction is normally used to mask off unwanted bits or fields from the incoming word.
Machine Codes:
:5Cnn INAM :5Enn INXM
Inputs a byte from the addressed device. The incoming data is logically ANDed with the lower 8 bits of the receiving register, and the results are placed in the lower 8 bits of the receiving register:
(Input Byte) 1\ (A)0-7 - AO-7 or
(Input Byte) 1\ (X)0-7 - Xo-7
This instruction is normally used to mask off unwanted data bits from the incoming byte and retain only those bits which are wanted.
Machine Codes:
:7Cnn IBAM :7Enn IBXM Registers Mfected:
AorX Previous contents of lower half replaced by masked input.
Timing: 1 1/4 3.3.4.5
RDA READ WORD TO A REGISTER
RDX READ WORD TO X REGISTER
Registers Affected: I REGISTER
Aor X Previous contents replaced by masked input.
Timing: 1 1/4 3.3.4.4 IBAM
IBXM
INPUT BYTE TO A REGISTER MASKED (UNCONDITIONALLY)
INPUT BYTE TO X REGISTER MASKED (UNCONDITIONALLY)
I REGISTER
15 14 13 12 11 10 9 8
DEVICE ADDRESS
115 14 13 12 11 10 9
DEVICE ADDRESS
Senses the specified data source in the addressed device. If a true response is received, a word is input from the device to the selected register. If a false response is received, the instruction is repeated. The instruction continues to repeat itself until a true response is received.
NOTE: This instruction is interruptable.
Machine Codes:
:59nn RDA
Registers Affected:
AorX Previous contents replaced by input word.
Timing: 1 1/4 3.3.4.6 RBA RBX
READ BYTE TO A REGISTER READ BYTE TO X REGISTER
I REGISTER
16 14 13 12 11 10 9
DEVICE ADDRESS
Senses the specified data source in the addressed device. If a true response is received, a byte is input from the device to the lower half of the selected register. If a false response is received, the instruction is repeated. The instruction con-tinues to repeat itself until a true response is received.
Note: This instruction is interruptable.
Machine Codes:
:79nn RBA :7Bnn RBX Registers Mfected:
AorX
Timing:
3.3.4.7 RDAM RDXM
Previous contents of lower half replaced by input byte. Upper half unchanged.
1/4
READ WORD TO A REGISTER MASKED READ WORD TO X REGISTER MASKED
I REGISTER
16 14 13 12 11 10 9
DEVICE ADDRESS
This instruction is a combination of the Read Word instruc-tion and the Input Word Masked instrucinstruc-tion. The specified data source in the addressed device is sensed. If a true response is obtained, a word is read from the device. The input word is ANDed with the contents of the selected register and the result is stored in the selected register. If a false response is obtained, the instruction repeats itself until a true response is obtained.
Note: This instruction is interruptable.
Machine Codes:
:5Dnn RDAM :5Fnn RDXM Registers Affected:
AorX Previous contents replaced by masked input.
Timing: 1 1/4 minimum 3.3.4.8
RBAM READ BYTE TO A REGISTER MASKED RBXM READ BYTE TO X REGISTER MASKED
I REGISTER
16 14 13 12 11 10 9