The results of certain tests by the channel and device, and the original state of the addressed part of the I/O system are used during the execution of an I/O instruction to set one of four condition codes in the PSW. The condition code is set at the
time the execution of the instruction is concluded, that is, the time the CPU is released to proceed with the next instruction. The condition code ordinarily indicates whether or not the function specified by the instruction has been performed and, if not, the reason for the rejection. In the case of START I/O FAST RELEASE executed independent of the device, a condition code 0 may be set that is later superseded by a deferred condition code stored in the CSW.
The figure "Condition-Code Settings for I/O States and Instructions" lists the I/O-system states and the corresponding condition codes for each I/O instruction. The I/O-system states and
associated abbreviations were defined in the section
"States of the Input/Output System" earlier in this chapter. The digits in the figure represent the decimal value of the code.
Chapter 12. Input/Output Operations 12-11
Condition-Code Settings I/O SID
I/O-System States State SIOF TID CLRIO HID HDV TCH STIDC
Available AAA 0,1 *@ 0 0 1* 1* 0 0
Interruption pending in device AAI 1*@ 1* 0 1* 1* 0 0
Device working AAW 1*@ 1* 0 1* 1* 0 0
Device not operational AAN 3@ 3 0 3 3 0 0
Interruption pending in subchannel AIX
For the addressed device 2 1* 1* 0 0 0 0
For another device 2 2 0 0 0 0 0
Subchannel working AWX
With the addressed device 2 2 1* 1*# 1*# 0 0
With another device 2 2 0 1*# 0 0 0
Subchannel not operational ANX 3 3 3 3 3 0 0 Interruption pending in channel IXX ---See Note 1 ##
Channel working WXX
With the addressed device 2 2 *** 2 + 2 ##
With another device 2 2- ** 2 ~ 2 ##
Internal activity 2 2-
**
2 ~ 2 ##Channel not operat i ona I NXX 3 3 3 3 3 3 3 Explanation:
* Whenever condition code 1 is set, the CSW or its status portion is stored at location 64 during execution of the instruction.
**
When CLEAR I/O encounters the WXX state, either condition code 2 is set, or the channel is treated as available and the condition code is set according to the state of the subchannel. When the channel is treated as available, the condition codes for the WXX states are the same as for the AXX states.***
Condition code 1 (with the CSW stored) or 2 may be set, the channel.depending on
~ The condition code depends on the state of the subchannel, the channel type, and the system model. If the subchannel is not operational, condition code 2 or 3 is set. If the subchannel is available or working with the addressed device, condition code 2 is set. Otherwise, condition code 0 or 2 is set.
# When a "device not operationall l response is received in selecting the addressed device, condition code 3 is set.
@ START I/O FAST RELEASE may cause the same condition code to be set as for START I/O or may cause condition code 0 to be set.
+ If the channel ascertains that the device received the signal to ter-minate, condition code 1 is set and the CSW stored. Otherwise, condition code 2 is set.
## When the channel is unable to store the channel ID because of the working or interruption-pending state, condition code 2 is set. If the working or interruption-pending state does not preclude storing the channe I I D, cond i t i on code 0 is set.
- If the subchannel is interruption-pending for the addressed device, condition code 1 may be set depending on the channel type.
Note: For the purpose of executing START I/O, START I/O FAST RELEASE, TEST I/O, CLEAR I/O, HALT DEVICE, and HALT I/O, a channel containing an interruption condition appears the same as an available channel, and the condition-code setting depends on the states of the subchannel and de-vice. The condition codes for the IXX states are the same as for the AXX states, where the XS represent the states of the subchannel and the de-vice. As an example, the condition code for the lAW state is the same as for AAW.
Condition-Code Settings for I/O States and Instructions
12-12 IBM 4300 Processors Principles of Operation
(
The available state results in condition code 0 only when no errors are detected during the execution of the 1/
°
instruction.When a sub channel on a multiplexer channel contains an interruption condition (state AIX), the 1/
°
device associated with the concluded operation normally is in the interruption-pending state.When the channel detects during the execution of TEST I/O that the device is not operational, condition code 3 is set. Similarly, condition code 3 is set when HALT I/O or HALT DEVICE is addressed to a subchannel in the working state (state AWX), but the device is not operational.
Error conditions, including all equipment or programming errors detected by the channel or the 1/
°
device during execution of the I/O instruction, generally cause the CSW to be stored. However, when the nature of the error causes amachine-check interruption, but no 1/
°
interruption, to occur, the CSW is not stored.
Three types of errors can occur:
Channel-Equipment Error: The channel can detect the following equipment errors during execution of START I/O, START I/O FAST RELEASE, TEST I/O, CLEAR I/O, HALT I/O, and HALT
DEVICE:
1. The channel received an address from the device during initial selection that either had a parity error or was not the same as the one the channel sent out. Some device other than the one addressed may be malfunctioning.
2. The unit-status byte that the channel received during initial selection had a parity error.
3. A signal from the I/O device occurred at an invalid time or had invalid duration.
4. The channel detected an error in its control equipment. (This is also true for STORE CHANNEL ID and TEST CHANNEL.) The channel may perform an I/O selective reset or generate a halt signal, depending on the type of error and the model. If a CSW is stored,
channel-control check or interface-control check is indicated, depending on the type of error.
Channel-Programming Error: The channel can detect the following programming errors during execution of START 1/
°
or START 1/°
FASTRELEASE. All of the errors are indicated during START I/O, and during START I/O FAST RELEASE when it is executed as START I/O, by the condition-code setting and by the status portion
of the CSW. When the SIOF function is
performed, the first two errors are indicated as for START I/O, and the remaining errors are indicated in a subsequent interruption.
1. Invalid CCW -address specification in CAW 2. Invalid CAW format
3. Storage location of first CCW not provided 4. First-CCW location in a disconnected page 5. First-CCW location protected against fetching 6. First CCW specifies transfer in channel 7. Invalid command code in first CCW 8. Invalid count in first CCW
9. Invalid format for first CCW
The CSW indicates program check, except for items 4 and 5, for which protection check is indicated.
Device Error: Programming or equipment errors detected by the device during the execution of START I/O, or START I/O FAST RELEASE are indicated by unit check or unit exception in the CSW.
The causes of unit check and unit exception for each type of 1/
°
device are detailed in the SL publication for the device.Instruction Formats
All I/O instructions use the following S format:
Op Code
o
16 20 31Except for STORE CHANNEL ID, bit positions 8-14 of these instructions are ignored. Bit position 15 is ignored by the instruction TEST CHANNEL but is decoded as· part of the operation code for CLEAR I/O, HALT DEVICE, HALT I/O, START I/O, START I/O FAST RELEASE, and TEST I/O.
The second -operand address specified by the B2 and D2 fields is not used to designate data but instead is used to identify the channel and I/O device. Address computation follows the rules of address arithmetic. The address has the following format:
1IIIIIIIIIchn
AddrlDev Addrl8 16 24 31
Bit positions 16-31 contain the 16-bit I/O address. Bit positions 8-15 are ignored.
Chapter 12. Input/Output Operations 12-13
Instructions
All I/O instructions cause a serialization function to be performed. See the section "Serialization" in Chapter 5, "Program Execution." .
The names, mnemonics, format, and operatIOn codes of the I/O instructions are listed in the figure
"Input/Output Instructions." The figure also indicates that all I/O instructions cause a program interruption when they are encountered in the problem state, that all I/O instructions set the condition code, and that all I/O instructions are in the S instruction format.
Note: In the detailed descriptions of the individual instructions, the mnemonic and the symbolic operand designation for the assembler language are shown with each instruction. In the case of START I/O, for example, SID is the mnemonic and D
lB
~ the operand designation.Programming Note
The instructions CLEAR I/O, HALT DEVICE, HALT I/O, START I/O, START I/O FAST RELEASE, STORE CHANNEL ID, and TEST I/O cause a CSW to be stored. To prevent the contents of the CSW stored by the instruction from being destroyed by an immediately following I/O interruption, the CPU must be disabled for all I/O interruptions before CLEAR I/O, HALT DEVICE, HALT I/O, START I/O, START I/O FAST RELEASE, STORE CHANNEL ID, and TEST I/O is issued and must remain disabled until the
information in the CSW provided by the instruction
Mne-Name monic
has been acted upon or stored elsewhere for later use.
CLEAR I/O
CLRIO [S]
9D01
o 16 20 31
Either a TIO or CLRIO function is performed, depending on the block-multiplexing control, bit 0 of control register O. The TIO function is
performed when the block-multiplexing-control bit is zero.
The TIO function is described in the definition of the instruction TEST I/O.
Bits 8-14 of the instruction are ignored. Bit positions 16-31 of the second-operand address identify the channel, subchannel, and I/O device to which the instruction applies.
The CLRIO function causes the current operation with the addressed device to be
discontinued and the state of the operation at the time of the discontinuation to be indicated in the stored CSW.
When the subchannel is available, interruption-pending with another device, or working with another device, no channel action is taken, and condition code 0 is set. Channels not capable of determining subchannel states while in the working state may instead set condition code 2.
Op
Characteristics Code
CLEAR I/O CLRIO S C P $ 9D01*
9E01*
HALT DEVICE HDV S C P $
9EOO*
HALT I/O HIO S C P $
9COO*
START I/O SIO S C P $
9C01*
START I/O FAST RELEASE SIOF S C P $
STORE CHANNEL ID STIDC S C P $ B203
TCH S C P $ 9FOO;t
TEST CHANNEL
9000*
TEST I/O TIO S C P $
Explanation:
C Condition code is set.
P Privileged-operation exception.
S S instruction format.
* Bits 8-14 of the operation code are ignored.
;t Bits 8-15 of the operation code are ignored.
$ Causes serialization.
Summary of Input/Output Instructions
12-14 IBM 4300 Processors Principles of Operation
When the subchannel is either working with the addressed device or interruption-pending with the addressed device, the CLRIO function causes condition code 1 to be set and causes the channel to discontinue the operation with the addressed device by storing the status of the operation in the CSW and making the subchannel available. When the channel is working with the addressed device, the device is signaled to terminate the current operation. Some channels may, instead, indicate busy and cause no channel action.
When any of the following conditions occurs, the CLRIO function causes the CSW at location 64 to be stored. The contents of the entire CSW pertain to the 110 device addressed by the instruction.
1. The channel is available or interruption-pending, and the subchannel contains an interruption condition for the addressed device or is working with the addressed device. The subchannel-key, command-address, and count fields describe the state o( the operation at the time of the execution of the instruction.
2. The channel is working with the addressed device. The subchannel-key, command-address, and count fields describe the state of the operation at the time the instruction is executed. (Some channels alternatively indicate busy under this condition.)
3. The channel is working with a device other than the one addressed, and the sub channel contains an interruption;"pending condition for the addressed device or is working with the addressed device. The subchannel-key,
command-address, and count fields describe the state of the operation at the time CLEAR 1/0 is executed. (Some channels alternatively indicate busy under these conditions.)
\
4. The channel detected an equipment error during the execution of the instruction. The CSW identifies the error condition. The states of the channel and the 110 operations in progress are unpredictable. The limited channel logout, if stored, indicates a sequence code of 000.
When CLEAR 110 cannot be executed because of a pending logout that affects the operational capability of the channel, a full CSW is stored.
The fields in the CSW are all set to zeros, with the exception of the logout-pending and channel-control-check bits, which are set to ones. No channel logout is associated with this status.
Program Exceptions:
Privileged Operation Resulting Condition Code:
a
No operation in progress for the addressed device1 CSW stored 2 Channel busy 3 Not operational
The condition code set when CLEAR 110 causes the CLRIO function to be performed is shown 'for all possible states of the 110 system in the figure
"Condition Codes Set by CLEAR 1/0." The condition code set when CLEAR 110 causes the TIO function to be performed is shown for all possible state of the 110 system in the figure
"Condition Codes Set by TEST 1/0" in the definition of the instruction TEST 1/0. See the section "States of the Input/Output System" in this chapter for a detailed definition of the A, I, W, and N states.
Chapter 12. Input/Output Operations 12-15