ERC
Read 0700 0701 0702
This routine checks that the String Address Decode error bit 1 of the String Select register detector has detected either:
• Two gated A clock enable at the same time.
• No gated A clock enable.
Function String Select
1. Write the String Select register using C-Clock stop, Not MIOC Diagnostic Mode and string address O.
2. Write the Step register with data X'Ol' to activate the shift mode.
3. Read the String Select register and check for an address decode error.
4. Increment the string address and loop for all 16 strings.
Error Description RAC Comments
register 811
One string in error. 821 All but one string in error 823 822 Some strings in error. 824 825 826 827 830
AAll - STEP REGISTER TEST (PART 3)
ERC 0700 0701
This routine checks that the shift values put in the Step register cause the Scan register to be shifted the correct number of steps.
• Test Scan register shift mechanism.
• Test that string address X'F' shifts in ones and string address X'O' shifts in zeros.
1. Write the data in the Scan register.
2. Initialize the Step register.
3. Verify the data in the Scan register, step-by-step.
4. Test with string address X'O' and X'F'.
Function Error Description RAC Comments
Write/read Scan register for Read data not equal to 811 EXP DATA and RCV
stri ng address '0 ' expected data. DATA fields
contain
Write/read Scan register for respectively
string address 'F' expected
shift data and received shift data
AA12 - STEP REGISTER TEST (PART ~)
ERC 0700
0701
Read data
This routine checks that the address decode of X'20' through X'27' causes the correct number of shifts in the Scan register.
This also checks the setting of the correct value in the Step register.
A test of the address selection mechanism is done by the lSSD operation in order to perform the scan-in. The initial data in the Scan register is X'80'. The routine changes the byte and bit counts in the Scan-In buffer in order to perform the
required number of shifts. The data. after the scan-in. depends on the number of shifts.
Function Error Description RAC Comments
from Scan register Read data not equal to 811 EXP DATA and RCV
expected data. DATA fields
contains respectively expected shift data and
received shift data
Check for level 0 interrupt CCU parity check 803 ADDIT INFO field displays the contents of MCC Status Register
AA13 - SCAN REGISTER WRAP TEST
ERC 0700
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Write.
This routine checks that data is correctly shifted around in the Scan register.
1. Select string address X'D' to wrap the Scan register.
2. Use a series of floating ones and zeros in the Scan register.
3. Shift the Scan register 8 times.
4. Verify that the Scan register contains the original value.
Function Error Description RAC Comments
shift. and read back Read data not equal to 811 EXP DATA and RCV
the Scan register. expected data. DATA fields
contain respectively original value and received value
_ e _ e e e e e eeeeeeee
AA14 - CCU LSSD STRING TEST
This routine checks all the latches of the 12 operational strings (addresses X'I' through X'C'), linked to the LSSD mechanism.
I. Select each string in turn, one at a time.
2. Write it with the following test pattern X'OOFF03F03EOFOE32'.
3. Read the string.
4. Compare written and read data.
ERC Function Error Description RAC Comments
0710 0720
0721
0722
0730 0740 0750
Write/read the 12 LSSD
strings with a test pattern 811 see note below
830 One string only with data 831 832
error 833
Errors found on strings 5 or 835 834 6 (DFLI-3) and on strings 7 836 or 8 (DFll-2) and on strings 837
9 or A (DFlI-l) 841
Errors found on strings 3 (CTlI), 4 (CTL2), B (DFL4), and C(DFl5)
Errors found on strings I (MIOC), 2 (BTAC), and B (DFL4)
All stri ngs fail
String address failure
Mixture of erroneous strings other than previous cases
Nata: The ADDIT INFO field displays the count of errors found for each string. The first line of the ADDIT INFO field gives error counts for strings X'I' through X'8', the second line for strings X'9' through X'C'.
ADDIT INFO Byte String Address CCU Card ID
1st line byte 0 I MIOC
1st line byte I 2 BTAC
1st line byte 2 3 CTLI
1st line byte 3 it CTL2
1st line byte it 5 DFll-3
1st line byte 5 6 DFLI-3
1st line byte 6 7 DFll-2
1st line byte 7 8 DFll-2
2nd line byte 0 9 DFll-l
2nd line byte I A DFL1-l
2nd line byte 2 B DFLit
2nd line byte 3 C DFL5
2nd line bytes it to 7 H/A 0
ABOI - CCU CLOCK DISTRIBUTION TEST
ERC 0700
This routine checks that the C-Clock is distributed to every chip of all CCU cards.
1. Write at least one bit in each chip via LSSD operations.
2. Do a single clock step.
3. Read back the latches via an LSSD operation.
Function Error Description RAC Comments
Verify value of selected Read value not equal to 818 latches in different chips expected value 841
on every card. 853
854 855 856 857 858 859 87A
AB02 - MOSS/CCU SCOPING (MANUAL INTERVENTION ROUTINE)
ERC
This routine loops on given command, address, and data patterns to allow the CE to scope the MOSS/CCU interconnection.
In response to prompting messages, the CE selects one of the MOSS/CCU lines and the value to be put on the address or data bus.
Function Error Description RAC Comments
Prompting messages for CE 89F (see MIM 1, Chapter 14,
Section 2>'
eee e e e e e e e e e e e e e
ABOl - CCU BER ANALYSIS PROCEDURE (MANUAL INTERVENTION ROUTINE)
This manual intervention routine provides a FRU list for a CCU hardcheck failure. It analyses the contents of registers X'7D', X'7E', and X'76' given by the BER. The contents of the register are entered by the CE on the operator console. The FRU list is then displayed.
Notes:
1. In the case of a storage 2-bit error, RAe 7CF is displayed instead of a FRU list.
2. If the FRU list is flagged, try to correlate it with other BERs CIOC bus. TSS. channel adapter) if any.
Message 1: 'CCU BER ANALYSIS PROCEDURE => PRESS SEND'
Message 2: 'REPLY X7D, X7E, X76 REG VALUES CRXXXXYYYYZZZZ) => PRESS SEND' The CE should reply with 'Rxxxxyyyyzzzz'. where:
xxxx = contents of X'7D', yyyy = contents of X'7E'. zzzz = contents of X'76' and press SEND.
Message 3: 'X7D=xxxx X7E=yyyy X76=zzzz => PRESS SEND'
ERC Function
0700 Storage 2-bit error:
For all other checkers, a FRU list is directly given on the screen with the following analysis:
-Reset CCU and lOCI summary bits in X'7E'.
-If bits on in X'76' byte 1 Cbits meaningless) reset all other checkers.
-If 'Z Register Parity Error'. and not alone, reset it.
-If 'Adapter Initiated Op'. the FRU list is flagged with two asterisks.
-If 'Adapter Initiated Op' and 'MOSS Initiated Op.' not alone, reset them.
-If 'IOC Timeout' or 'lOCI Bus In', reset X'16', byte 0, bits 0 through 3.
-If 'Address Fetch' or 'Instruction Fetch', reset all other checkers.
-If 'Invalid Op Code'. reset all other checkers.
-If 'ROS Parity Error', reset all other checkers:
One checker: FRU list depends on this checker.
More than one checker: FRU list is computed.
The following message is now displayed:
'XXXX XXX X XXXX XXXX XXXX XXXX => PRESS SEND' Where XXXX is a FRU, or blank.
Press SEND to end the routine.
Error Storage 2-bit error on
RAC 7CF
ACOI - CCU-TO-MOSS STATUS C REGISTER TEST
ERC 0700 0701 0702 0703
This routine checks that all the latches of the CCU-to-MOSS Status C register can be set and reset from the MOSS.
1. Read the register after CCU initialization.
2. Write the register with X'FF' via the lSSD and check.
3. Use floating ones and zeros to verify the setting and resetting of all latches.
Function Error Description RAC Comments
Test the register after CCU A latch remained set after 811
initialization. CCU initialization. 80A
Write register with X'FF'. Invalid data using read aDA
Set latches and verify latch not set 80A EXP DATA and
setting DATA fields
contain Reset latches and verify latch not reset aDA respectively
resetting expected and
RCV
received values
AC02 - CCU-TO-HOSS STATUS A REGISTER TEST
ERC 0700 0701 0702
This routine checks that all the latches of the CCU-to-MOSS Status A register can be set and reset from the MOSS.
1. Read the register after CCU initialization.
2. Use floating ones and zeros to verify the setting and resetting of all latches.
Function Error Description RAC
-
CommentsTest register after CCU A latch remained set after 811
initialization CCU initialization. 809
set latches and verify latch not set 809 EXP DATA and
setting DATA fields
contains Reset latches and verify latch not reset 809 respectively
resetting expected and
RCV
received status
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