Equipment Diagrams CONTROL DATA 8092
TELEPROGRAMMER
<C> 1968 CONTROL DATA CORPORA~ION Print.d ~n the United Stat.s of America
Equipment Diagrams CONTROL DATA 8092
TELEPROGRAMMER
Pull. No. au 108001»
RECORD OF REVISIONS
REVISION NUMBER - NOTES
368109 01 {Rev A} {4-15-65} Incl~des ECO's 1163, 1198, 1268, 1334, 1354, 1402, 1403, 1411, 1431. 1470, 1505. and 1585.
~ 109 DOb {Rev B} (8-18-66) Includes ECO numbers 2041 and 2085 {Reprinting with revision}.
Revision C {3-10-67 } Includes ECO's DP2329 and DP2383.
Revision 0 {8-?9-67 } Includes ECO's DP2055, 2249, 2279, 2500, 2590, 2356, 2329 2328, 2370. 2365, 2512, 2450. and 2383 {Reprintinq with revision}.
Revision E {11-8-67} Incorporated FCO's DP 2329. 2450
Revision F {1-25-68} Revised to incorporate FCO DP2870. P aqes revised: Paqes 2 5 18 Revision G {4-23-68} Reprint with revision. Includes ECO OP2886. Addition of list of terms.
Revision H {8-15-68} Revised to incorporate F CO DP03130. P age revised: Page 2 of 36042600.
Revision J {1-30-69} Revised to incoroorate ECO OP03333 and to add a schematic for the disolav oanel New orodllC!t designations: 8092-A22/_B23/ -008/ -E03. Revised Table of Contents. P ages vii, 16, and added pages 28. 29.
30 and 31.
"
Publication Number
368 109 00
Page 1 2
3 4 5 6 7 8 9 10 11 12 13 14
TABLE
Title Block Diagram
Main Control Main Timing
Registers, F & FI & Translators Function Translators
R & a Inverters Register - AI Registers - A & 0 Registers - Z
Registers - P & pI Register - P S R Register - S & S I Storage Translators Typical Storage Circuits
OF
Drawing Number 364038 360426 364156 360449 360427 360428 364157 360429 364158 360430 364159 364160 360431 360442
CONTENTS
Page Title
15 Register - Tag 1, 2, and 3 16 Input/Output Control
1 7 Interrupt
18 Buffer Controls
19 Registers - BFR, BXR, BER 20 Control Console
21 Power Supply - 8606A 22 Cabling & AC - DC Dist.
23 8092 Display Schematic
Note: For units having display panel (part number 47000000), use this schematic.
27 8092 Display Schematic
Note: For units having display panel (part number 47091200), use this schematic.
31 Power Supply Schematic (8092-D/-E)
Drawing Number 360433 360425 360434 360447 360432 360437 364071 360441 47032300
47094800
47046500
Logic Symbol AOOO, AOIO, A070 AIOO, AIIO, AI70 COOO- C007 EOOO, EOI0-,E070 EOO I, EO I I -, E071 E200, E201, E202 000, E301, 002 E400, E401, E402 E500, E501-, E507 F002
003 012 013 014 015 022 023
025
031 041 042 050 052 053 054 056 057 059 060 061 062 063 064 065 066 067 068 069 070 071 072 073 074 075 076 077 078 079 080
8092 TERM LIST Function A Register AI Register Clocks
Stage Enable (SE) F/Frs No Stage Enable (SE) F/Frs Group Enable (GI) Ar Register
Group Borrow Generators (GBG) Ar Register Group Borrow Input (GBI) Ar Register 'Stage Probe Input (SPI) Ar Register
XXX XXO XXX XXI XXX XOX XXX XIX XXX XOX XXX XIX XXX OXX XXX IXX XXX IXX XXO XXX XOX XXX XOX XXX IXX XXX OXX XXX IXX XXX XXX 100 XXX 000 XXX XII
XXX I XX, XXX I I I XXX X 10
XXX 001 XXX 010 XXX 011 XXX 100 XXX 110 XXX III XXX XOI XXX XOO XXX XIO XXX OOX XXX 001 XXX 010 XXX 011 XXX 100 XXX 110 XXX III XXX XOI XXX OOX XXX IXI 000 XXX
8 7
13
6 6 7 7 7 7 4 4 4 4 4 4 4 4 4 4 4 4 4 4 4 4 4 4 4 4 4 4 4 4 4 4 4 4 4 4 4 4 4 4 4 4 4 4 4 4
v
Logic Symbol F081
082 083 084 085 086 087 088 089 090 091 092 093 094 095 096 097 098 099 101 112 114 115 120 121 122 123 124 125 127 130 131 132 133 134 F200 F206
F208 F2Q9 F211 F213 F214
Function 001 XXX OIX XXX OIX XXX 100 XXX 101 XXX 110 XXX III XXX 000 XXX 000 XXX 001 XXX 100 XXX 101 XXX 101 XXX 110 XXX 110 XXX III XXX III XXX III XXX III XXX XIX XXX XX 000 XXX
III XXX
III lXX, III III III OIX
III OIX III OIX III OIX III 101 III 101 III OIX 000 101 XXX IXI OXI XXX OXI XXX all XXX
G-+ llEnt. + Swp.) (SSIDU4X + sx.cr) . (SSI) (DBA) + C [lEnt. + SWPr,) (SSI)] : r' l1:L+ 5~.cr + 76) + 72.crB uEn~. + Swp.) ,
(SSI~ A (Ent )(Swp.) (SSI) + D DEnt. + Swp.)
(SSI + (Swp.) .
(Buf BSY) (04 + 05 + 70 + 71) + 6X (Jump SAT) F208
6X (Jump SAT) + (Buff BSY) (04 + as + 70 + 71 ) 17 + 23 + 24 + 27 + 33 + 37 + 44 + 45 + 46 + 47 + 52 + 56
31 + 35 + 41 + 45 + 51 + 55 + 72.CT + 73.CT
4 4 4 4 4 4 4 4 4 4 4 4 4 4 4 4 4 4 4 4 4 4 4 4 4 4 4 4 4 4 4 4 4 4 4 5
5
5
5
5
5
5
Logical Symbol F216
F222
F226 F229 F232 F233 F235 F236 F239 F242 F243 F248 F251 F252 F256 F261 F271 F300 F301 F302 F303 F304 F305 F306 F307 F308 F310
Function
I(Ent. + 5wp.).-15S1) fi.(11 + 15 + 41 + 45 +
~'I + 55 + 72.CI + .CI) + C (load + 00 + 04
+ 05 + 10 + 14 + 20 + 24 + 30 + 34 + 6X + 70 + 71 + 72 + 73 + 74 + 75]+ A UEnt.) (5wp.) (SSr'TI+D (Ent. + 5wp.) (551) + (Ent. + 5wp.) GEnt. + Swp.) (55r'~ lfB (II + 15 + 41 + 45 +
51 + 55 + 72.CT + ~3.CT) + C (Load + 00 + 04 +
05 + 10 + 14 + 20 + 24 + 30 + 34 + ~~70 ±--
~72.CT + 73.CI + 74 + 75 + AUEnt.) (5wp.) (551jJ+ DITEnt. + 5wp.) (551 + (Ent. + 5wp.) 12 + 16 + 22 + 26 + 32 + 36 + 42 + 46
I I + I 2 + 13 + I 5 + I 6 + I 7 + 22 + 23 + 26 +
27 + 31 + 32 + 33 + 35 + 36 + 5X.CT + 4X 04 + 05 + 20 + 21 + 22 + 23 + 30-.2 31-.2 32_
+ 33 + 5X + 70 + 72 + 74 + 75 + I X + 4X + 6X
72 + 73 + 75 01
5X + 72 + 73 + 75
5X.CT + 75.CT + (72 + 73) (A' 0) (I/O 5eq.) (Load) + 6X (Jump 5AT) + 40 + 44 + 77 + (Buff BSY) (04 + 05 + 70 + 71 )
CT + 55 + 75
A/O Jump 5AT Jump SAT
20 + 2 ~_. + 22 + 23 + 30 + ~I 73) C LJEnt. + 5wp.) ( 551 11
13
P ~ 5, P T ---S I
5.C'
Z~5
Tag __ 5 T
A~ 5
MC5~ Z
+ 32 + 33 + (72 +
INP~ Z: (Ent. + Swp.}(551 [!.72.CT + C(load]
Clear F/FT
5
5
5 5 5 5 5 5 5 5 5 5 5 5 5 5 5 5 5 12
5 5 5 5 5
vi
Logic Symbol F311
F313 F315 F316 F317 F318 F319 F320 F321 F322 F323 F324 F325 F326 F327 F328 F329 F331 F332 F580 F502 F503
GOOO - G207 HOOO - H007 H201 - H231 1001 - 1005 1006
1011 - 1015 1016
1021 - 1025 1026
1031 - 1034 1036
1041 - 1045 1046
1051 - 1055 1056
1061 - 1065 1066
1071 - 1075
Function Z ~ F/FT Z ~ Ou
+Z~ R
-Z~R
+1 ~R A~R
A __ Q A.2T ~ Q +1 ~Q
Block Probe AT AI
~A
A ~ Tag Reg Tag Reg -+ A A ~ BER. I 3 ~ BER A ~ BXR, 13 -+ BXR BER -+ A
AI~P, Tag-+PT
1NP~ Z: 76 + C + (Ent + 5wp) + (551) 01 + 0 + (Ent. + 5wp) + (551)
70 + 71
(boad + (CI ear F/F') + (Ent + swp] (70 + 71 ) LlLoad) (Clear F/FT) (Ent + 5wplJ (70 + 71)
Read Write Drivers Plain Timing DelayTs SSC Timing Delay's
Z Register
Enables -- 5
Z Register
S Register
Z Register S Register Z Register S Register Z Register
S Register
Z Register
S Register
Z Register 5 Register
Z Register
5 5 5 5 5 5 5 5 5 5 5 5 5 5 5 5 5 5 7 18 18 18 13 3
2 9 12 9
12 9
12 9
12 9
12 9
12 9
12
9
LogiC 5ymbol I076
1200 ,- 1219 1300 - 1369 1400 - 1401 1402
1403
1404 - 1414 1500 - 1538 1519
1550
1551 1554 1560 1561 1562 1570 1571 1573 1574 1577 1580 1582 1588 1590 1593 1852 1853 1857 1859 1860 1861 1862 1863 1872
JOOO - J031 JIOO - JI03 JI03
Function 5 Register A Register
Tag Register I, 2, 3 ATRegister
AT I- 0
A' = 0
o Register BFR, BER, BXR BER = BXR
A (Ent) (Swp) (551) + B (Ent + 5wp) (551) + (74 + 75 + 76) flo (Ent + 5wp) (5S1D
(Load + EEnt. + 5wp) (13) (00 + 01 + 02 + 03
+06 + 07 + 77) (01 I 5X (Jump 5AT) + (04 + 05 +70 + 71) (Buff BSYU + C (Ent + 5wp) (SS'I)
(55 + 75) (IBA) + (DBA) (Buffer Cycle)
BFR ->- Buff Output Cab I e (B. D. C)
Z ->- B.O.C.
Z ->- B.O.C.
(Buff ROY) + (IBA) + (input ROY) INP ->- BFR
(Buffer Cycle) + (OBA) + (Time 22) MC5 -.. BFR
Buff INP Cab I e -.. Z
Clear Buffer Controls CI ear Buffer
(Buffer Busy) (551 )
(Buff Cycle)
(Int. 10, 20, 30, 40) Block P-.. 5
(Block P-..S) (I/O 5eq) (Ent + 5wp) (Load) (13) (Master CI ear) (Time 26) (0 (Ent + 5wp) (551) Clear P, P'
Interrupt Address -.. 5 (Int. 10, 20, 30, 40)
Interrupt Address Enable -.. 5 Interrupt Address -.. P5R Main Control Timing Main Control Timing Recirc
12
8
15 7 7 7 8
19
18 18 18 18 18 18 18 18 18 18 18 18 18 18 18 18 17 17 17 17 17 17 17 17 & 12 17
2 3
vii
Logic Symbol JI04 - JI07 J109-JIII JI07
J200
J211 - J212
J221 - J222 - J223 J224 - J225 - J226 J227 - J228
J231 - J232 - J233 J235
J243
J400 - J440 J441
J446 J560
J562 - J565 J900
J901 - J902 - J903 J904
J907 J908
J909 - J910 J912
J913 J914
J917 - J921 J923
J930
KOOO - K002 KOIO - KOl3 KIOO
KilO KI20 KI30 1(140 'K200 K210 K220
K222 - K224 K230
K240 K320 K322 K420
Function Main Timing I/O Control liming Error 5top
A + (Ent) + (5wp) + (551) B KEnt. + Swp.) (551)) C REnt. + Swp.) (SSIJ C'
C'
o (En t. + Swp.) ( 551 ) I/O Contro I
(I/O Seq. Set)
(Load) + B U'-E-nt-.-+-S-w-p) (551 il
(Main Timing Fault) 5torage
(Master CI ear) (Master Clear)
....,..-~
(Master Clear (Clear Z) (Master CI ear) (CI ear P) CI ear P'
Load Load Enter
(Enter + 5weep) ["oad
(Master Clear)
Timing Chain Excursion Counters Divert
Read Write Inhibit Timing Fault A Cycle B Cycle C Cycle C' Cycle
o Cycle Block P2 =P I Wait Output Function Ready Wait Input
REV. J 3
16 2 2 2 2 2 2
~ 2 16 16 16 2 13
3
3 3 3 3 & 10
3 3 3 3 3 3 2
13 13 13 13
2
2
2
2
2
2
3
16
16
16
Logic Symbol K440
KS22 KS24
K800 - K802 - K810 K812
K8S0 K8S2 K8S4 K8S6 K8S8 K860 K862 K864 K9QO K902 K904
LOOO - LOIO - LI 10 L321
L322 L323 L330 L331 L421
LSOO - LSIO - L610 LSI2
LSI3 LSI4 LSIS
MOOO - MOIO - M070 M330
M420 M424
MSOO - MSIO - Ms10 MSI2
MSI3 MSI4 M8S0
M8S1 - M8S2 M900
M901 M902 M903 M904 M90S M906 M907 M908 M909
NOOO - NOOS N210
Function I/O Seq.
Sample Enable
Resync. Counter Manual Interrupt Manual Interrupt Manua I Interrupt 10
Buffer Interrupt Buffer Interrupt 20 External Interrupt 30 External Interrupt 40 Interrupt Lockout Run
Step Neutral
o Register Inputs Information Ready Function Ready Master Clear I/O Sequence Load Mode Input Request BFR Outputs Information Ready Input Request Function Ready Master Clear Z Register Inputs Output Resume Input Ready Input Disconnect BFR Inputs Output Resume Input Ready Input Disconnect Manual Interrupt Input External Interrupt Input Run
Step Neutral Load
Master Clear Clear A C I ear Z CI ear P Enter Sweep
Timing ContrE..L.
CI ear A' : N212
16 16 16 2 16 16 16 16 16 16 16 16 3 3 3 8 16 16 16 16 16 16 19 18 18 18 18 9 16 16 16 19 18 18 18 17 17 3 3 3 3 3 3 3 3 3 3 2 7
Logic Symbol N212
N230 N232
N800 - N801
0000 - 0010 - OOSO POOO - POlO - P070 P002 - POl2 - P072 PIOO - PliO - PI20 PI30
PI02 - PI 12 - PI22 PI32
P200 - P314
QOOO - QOIO - Q070 ROOO - ROIO - R070 SOOO - SOlO - SOSO S060 - S070
SIOO - SilO - SI20 SI30
TOOO - TS07
viii
UOOO - UOIO - U070 VOOO - V046
V201 - V231 VS21
V901 - V903 WOOO - WOOS W020 - W023 W024
W028 WOS8
W070 - W073 WIOO
WI02 WIIO
WI22 - WI24 WI30 - WI60
Function
f(A-+Tag) + D + (Ent. + Swp.) + (SSI1) 'rTime 01)
Togg I eAT: N232
UA-+ Tag) + D + (Ent. + Swp) + (SSIIT (Time 23)
Clocks o Register
PI Register P2 Register PI Register P2 Register PSR - Register Q Inverters R Inverters
Divert F/F's, S Register R/W Driver F/F's, S Register R/W Drive F/F's, S'Register Storage Translators
Stage Borrow F/F'S (SB) Timing
Storage Sequence Control I/O Start of Timing Resync Timing Adv. P I by I Clear Sand S'
Adv. BER: (Buff Cyc Ie) (time 13) ADV. BER
10-6 -+ S
PI-+P I PI -+P2 , PI -+P2 Clear Z
Strobe Enab Ie Z -+ S Input -+ Z Clear F, Z-+F
7 7 7 2 6
10 10 10 10 II 6 6
13/12 13/12 13/12 13
6 3 2 16 2 10 12 19 19 12 10 9 9 12/17
9
4
Logic Symbol WI62 - WI64 W200 - W314 W250 - W264 W266 - W269 W320 - W327 W330 - W363 W364 - W368 W370 - W375 W460 - W464 W800
W810 W813
XOOO - XOIO - X020 X030
XIOO - XI 10 - XI20 XI30
X200 - X210 - X220 X230
X500 XS02 X504 XS06 XS08 XSIO XSI2 XSI4 XSI6 XSI8
X700 -.X710 -·X770 X800 - X810 - X890 X900 - X910 - X990 X902 - X912 - X992 Y006 - Y507
lOOO- lOIO - l070
Function l-+O
R & Q Inverters
At -+ A, BER -+ A, TAG -+ A A-+ BER
l Register BXR
TAG I. 2. 3
(Buff Cycle) (Time 02) A' -+ P, TAG -+ pI p _pI
13 + (Load) + (Clear F) + (Ent. + Swp) + (Time 23)
13 (Load) (Clear F) (Ent. + Swp.) (Time 23) Tag I Register
Tag 2 Register Tag 3 Register
Block Seq. Interrupt (F/F)
Storage Seq. Interrupt (551) (F/F) Buffer Cycle (F/F)
Buffer Ready (F/F) Buffer Input (IBA) (F/F) Buffer Output (DBA) (F/F) Buffer Step (F/F)
Initiate Buffer Output (F/F) Buffer Busy (F/F)
Buffer Sync. (F/F) BFR Register BXR Register BER Register Storage
l Register
ix
8 6 8 19 9 19 15 19 10 II II II
15
15
15
18
18
18
18
18
18
18
18
18
18
19
19
13
9
Ae2' +A
+1
Q
+A -z
I
BORROW PYRAMID
+z
R
()---PROBE TOGGLE
y
TAG , TRANS, BX
1L,
B _ E - I R r - - " " ! - - - , _ - - - r ....1<---;;/1
+1
MANUAL...:] SET
1
(B)A J--,
(8)A'
CLEAR A'_ - - - " '-r--r---r-' 1 L - - . + - - - ,
r - L -
BER _ _ Z - - - . .INHIBIT GENERATORS
MANUAL~
P
SET - (8) ~
S
(81
f--__ -r __
-+lTRANS-! - &
LATOR~
2048 OR 4096 WORD
8-BIT CORE STORAGE
(MCS) CLEAR P----" t-
_._f---
t- _p i S ' f---'
(4)
1--+--+-1
(4)'--r-
~r;-PSR
\f21
DIV
~ ~----~
NOTE:
I.-HEAVY LINES= DATA --LIGHT LINES=CONTROL
.---
r-- ' - -SENSE AMP
r-- II -
S
.1 I -
Z --..
(8)
IIANUAL SET
fN OUT
BUFFERED OR NORMAL
~
~~
T
E1'T2
fNTERRUPT
.DVANCE ...
MANUAL CONTROL
STORAGE
SEQUENCE
1---.,
CONTROL C LE AR-L-__
--r __ --'
REINC
v----o
8 PULSES TIMINGCHAIN 8 MOD B CONT
24 PULSES
A~~~~~~~---~
IIAIN CONTROL
~
I3 F
(6)
1-- F'
(2)
TIl T2 , T3
A
T
s----!> BXR ~
3 (f01
A
~g~~~~~L----r--~
1---+
RE ADSTORAGE ~WRITE
R~~~;:;CE ~OIVERT
f----+
INHIBIT'---~
INPUT/OUTPUT CONTROL
CONTROL LINES
BUFFER T 5 ----0
BER
INPUT/OUTPUT, ~~ ".~,
CONTROL LINES
li~~
RERI\EIICEIIRAWIIIGS
·1- CONTROL DATA 1i~,;\: ~
CORPORATION I
COIIPOIIEIIIS
-- ... -
~ ~Ii III I ... ""'E
II2E PIQIECT OR""""""I I D P. DIVISION
~ tfl<l ~ ... , ...
... 11IIU
~ I~
.~ DRAWING NUMBERIf"
6r. .I~ I{~ -
TIItEBLOCK DIAGRAM, 364038
~ «~ II II! I I m TELEPROGRAMMER- MODEL 8092 I~ 1
V231
v231 FI21 1403 J441 V221
K224 V221 F239 V221
K225
J904
JI6A
K224 M24C
<225
C' CYCLE
F242 V231
J38A
d05D VOIS X502 X512
C'
J25
J31A
1553
~~~i ~ I~ Ii
+(ENTlHSWPl+SSIJ917 K211
J917 K221
J917 K231
1553
1553
J917 J31C J32C
<231~
X504
r
~M05A
~
C002 C[(~ WP)(SSll]
O[(ENT+SWP l(SSIl]
~
~:r---
~
'"
STORAGE SEQUENCE CONTROL (SSC)
V005
~ ~
<000rt" =
J904 ;001J
KOIO"'- F
KOII J03I
J!04V003 voos
vooo
~
~
'"
"'-
<002
I -
J02
<003
<012
l -I -
J04
<013
l -
TIMING CHAIN EXCURSION COUNTER (EK)
KOOI
KOI!
KOOI
~
KOIO J030 J03 I
E3 KOl2
E2 <012
<013
<002
<003
K003
J08
JIOA
~---~J004 JII
PRIMARY TIMING CONTROL
+
'"
0
"'
.. "
z
M05C
COO3~
Keoo ~
~ K802MOl
"'-
M02KeOI <803
KalO
"'-
Kat2"03
'"
M04KBI! KSl3
RESYNC COUNTER
voae
va02 I06A V004 I07A
~
~
I21A VOID
~VOI6
~
VQ36Naoo
J 19A
rcoo4l-- --
V046~V022
HOOO Hoe2 H004 H006
CLOCK
_ORAWIIGS
COMPONENTS {UNLESS OTHERWISE INDICATED)
1 TOlEIANCE YALUE lID
I - -
1
<802~
MOSA KSII V901 K813<802~
M07 KalO V902 K813I - -
1
<801~
M08 K810 V903<B12
RESYNC TIMING
VOOI VOO3 lOSC V005 107C
~
~
121C VOl3
B--
C003 VOl5 VOl7V025 V201 NBOI V211 JI9C V221 J20A
~
~ . . . . ~130C
rc<i07l---
V023~H005
HOOI HOC3 H005 H007
H201 H211 H221 H231
CONTROL DATA CORPORATION D P DIVISION
PaOJ OR PROOUCT
1-==--1----1---1----18092 TELEPROGRAMMER ...
RESISfOU- rnLE LOGIC DIAGRAM,
MAIN CONTROL
DRAWI"II HUMBEI RE
36042600 D
SHT
RUN
E STEP
STEP-7 K902
NEUTRAL
MASTER CLEAR
CLEAR
ACLEAR
ZCLEAR
PLOAD
ENTER
SWEEP
I M24A
I K903
I I
-7
M25
-=
J M29A M30A
- 7
J901
P M29C M27C
-7~
J901
JI4
K M34C K39
~ I
M L39B 13&C
-7 I
IL L39C USD
-7
F280 F329
K320 K322 K420
M30C
K40 M26A JIOO
L34A
1590 J007 K902
J004 V003
L38C
L34C
L35C
=
1553
BLOCK P2 : PI K240
MI9A K241
77
F076 F099 J912
(IJ(IJ
F068 F078
K443
-- CONTROL DATA
CORPORATION D P DIVISION
-
~
__
~...
=--+---+----~---;8092TELEPROGRAMMER• mtE
LOGIC DIAGRAM.
MAIN TIMING
KII
J921 J923
F REGISTER
F050 KI3 FOSI
F040 KI2 F041
l031
lO21
lOll FOIO
K04
lOOI FOOO
KOI FOOl
F' REGISTER
l071 FIIO
KI5A Fill
Z061--~~--L-~FFIcI01c0~-'
KI4 FIOI
J28A F052 K02D F053
K02C F042
K05A
K02A F002 K03A F003
OXXXXX
IXXXXX
XOXXXX
XXXOXX
XXXIXX
XXXXOX
XXXXIX
XXXXXO
XXXXXI
FOOl FOIO
~
F020 F061 F071 XXXOOI
FOOO
~
F020 F062 F072 XXXOIO
K26C XXXOIl
F020
F021
K24C XXXIlO F021
F021
FOO3
~
FOl2 F067 F077 XXXXOI
KI9A
FOO3~
FOl3 F068 XXXXOO
FOOO
~
FOl5 F069 F060 XXXXIO
FOl2
~
F022 F070 FO 78 XXXOOX
F003
~
F023 F079 FI31 XXXIXI
K35A
F13~
OIXXXX+OXIXXX Foa2I I I I
L33C
F050 OOOXXX
F031
F040 K35C K37A
F050~
OOIXXXF041
~
F052 F082 F083 OIXXXX
F031 K28D K34C
F052~
OXIXXXF030 F040
~
F051 F084 F091 100XX X
K33A 10lXXX F051
L38A
F051
IIOXXX
-=
K29CIIIXXX
F051
FOl2 F023
F088 FI27 FI30 000101
~
F003 FOl2 FOO2~
F021 FI24 FI25
F096
F096
--
---
- .... - ..
111101
1I10lX
CONTROL DATA CORPORATION
D P DIVISION
-
J..:_=,,=..--f---l---I----I 8092 TELEPROGRAMMER mu LOGIC DIAGRAM,
REGISTERS. F a F
Ia TRANSLAlORS
SHI"FOg!
J221
F071 F092 J228
F092 J226
F07e F097 X517
F094 F251
J233 FOl4 F023 FOSS 1552
FOl4 FOgS
J223 J912
F060 F091
F077 FOl3 FI33
F083-=~=:l!~~
FOl3 -______ ~
FOS3
FOl3 F089
F073 F090
FI23 1403 J441
F092 J227
~
FI23 ~ ~
FI25
K224
~
18A LI8eFOSS F240 F243
FI24
•
F022 F083 F098 F233
FI23 J223
F078 FOS8
+
FI22
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FUNCTION READY
MASTER CLEAR
1/0 SEQUENCE
LOAD 110 DE
LOAD MODE
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K858
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032B 033A
r856 r857
J233
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V036 1858
+
1<854 031
... K861
J002 K860
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INTERRUPT- 40
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A' ~. CONTROL DATA
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CORPORATION I D P DIVISION
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8092 TELEPROGRAMMER
ORAWINC NUMIEt
Fe
360434 E.
SIfT
