Wire Bonding

The MuPix4 chip has pads to input and output the signals. There are pads to supply the chip with power and HV, furthermore there are pads that are connected to the ground potential. Furthermore, there are pads to set the internal currents and voltages and to enable a pixel for the ToT mode. The voltage for the baseline, the threshold and the injection pulses are input, too. If the readout sequence is started by applying the digital readout signals on the readout chip pads, the addresses of the hit pixels are applied at the twelve bit lines, six for the column and the row address each. The chip has no integrated counter so that an external clock has to feed the timestamps via eight bit lines into the chip. The chip then applies together with the pixel addresses the value of the timestamps when the hit occurred. The bonding diagram can be seen in appendix C.

(a) injection 1 (b) injection 2

Figure 7.1: Readout in the hit-flag mode of the two injections of the MuPix4 chip: 7.1a shows the readout of injection 1 and 7.1b shows the readout of injection 2.

MuPix2 and MuPix3 chips could be wire bonded without problems. But with the MuPix4 there was an issue in the beginning:

The first chips were wire bonded from the chip carrier to the chip, which caused short circuits between some pins and the substrate. The concerned bonding wires came too flat to the chip, so that they touched the scribe line (see figure 7.2a), which is connected to the substrate. In our case the substrate is at the potential of the HV. By pulling the bonding wires upwards, with a special needle, the short circuits could only be removed temporarily. However, the problem reappeared after some time. It seemed, that the HV bent the bonding wires back towards the scribe line.

The final solution was to bond from the chip to the chip carrier, because then the dis-tance between the bonding wires and the scribe line was larger (see figure 7.2b).

7.1.3 The Hardware

The hardware is the same as for the MuPix3 chip. Both the pixel addresses in the hit-flag mode and the ToT signal of one pixel are sent to the FPGA board. The tune DACs (TDACs) can only be set if the jumper J508 is at the position that is closer to the chip socket.

In the beginning a large digital crosstalk was discovered of the readout signals on the

chip pad carrier pad

scribe line bonding wire

(a) bonding from carrier to chip

chip pad carrier pad

scribe line bonding wire

(b) bonding from chip to carrier

Figure 7.2: Drawing of the MuPix4 bonding problem: Figure 7.2a shows the bonding pro-cedure that caused the short circuits between random signals and the substrate by touching the scribe line and figure 7.2b shows the solution of this problem.

Figure 7.3: MuPix4 chip glued and directly wire bonded on a thinned PCB.

ToT signal, so that the readout in the hit-flag mode produced more and more hits at thresh-olds below 1.3 V. Under this condition no signals of a⁹⁰Sr or⁵⁵Fe source or of the injec-tion pulses could be seen, only the signal of a laser diode could be detected. After a first step of debugging, where high-frequency parts of some signals were filtered by soldering capacitors directly at the pins of the chip socket between signals and ground, this crosstalk was only present at thresholds below 0.87 V. Some of these concerned signals were for example threshold, injections and baseline. The next step was to connect more power and ground pins of the MuPix4 chip via wire bonds to the chip carrier and hence to the PCB. That reduced the crosstalk below a threshold of 0.85 V. Connecting the analogue and digital ground to each other reduced the crosstalk further below a threshold of 0.82 V.

In the first step (filtering the signals) the two grounds were also connected, so that it can be assumed that the connection of the analogue and digital ground leads to the largest improvement.

7.2 Measurements

7.2.1 Pulse Shapes

The pulse shapes are not directly measured by using an oscilloscope because the used FPGA firmware written by Niklaus Berger has the option to make histograms of the ToT signal automatically, i. e. it counts how often each ToT was sampled with a binning of 20 ns which is the period of a 50 MHz cycle. This FPGA driven measurements have the advantages that the data can be better analysed and it is possible to do also large scans without doing every step by hand. Because the FPGA cannot show how the ToT signal looks like, the ToT signal taken with the oscilloscope is shown in figure 7.4. In addition the FPGA can trigger a pulse generator to which the LED is connected to obtain the latency. This information is stored in a text file and the pulse shape is obtained by means of a python programme. The ToT is about 1000 ns long at low thresholds which is much shorter than the ToT of the MuPix2 chip which was of the order of severalµs [Per12b].

The pulse shapes for different temperatures (see figure 7.5) show that the temperature effect is very small for the MuPix4.