universal tree circuits

by GIACOMO CIOFFI Fondazione U. Bordoni Rome, Italy

and

EUGENIO FIORILLO I.B.M. Itaiia

Milano, Italy

INTRODUCTION

In the last few years the progress of integration tech-niques of more and more (;omplex digital circuits has led to the development of a new branch of the switching theory known as cellular logic. 1 Nevertheless the integration of cellular circuits of a certain degree of complexity is hampered at present by poor yield, that is by the likelihood that one or more cells of the circuit may turn out to be faulty. It is useful, therefore, to try to use these circuits even when there are some faulty cells. Generally speaking there are two possibilities:

(a) to provide a certain degree of redundancy in the circuit, so as to be able to replace the faulty cells with spare cells;2

(b) to use, if possible, only the part of the circuit functioning correctly.

The second way seems easier to carry out, since it does not require interventions on the circuit already realized.

Apart from the choice of either way, it is necessary above all to carry out the diagnosis of the circuit in order to determine what failures have taken place.

In the present paper these problems are studied in the case of universal cellular tree circuits.3 ,4 In the first part . a minimal set of diagnostic tests is derived; in the second part a criterion is set forth which, on the basis of the results of the tests carried out, makes it possible to find some functions that can be realized by the faulty circuit.

Cellular tree circuits

A cellular tree circuit with n levels, An, is a circuit having the structure shown in Figure 1, and can implement any function of the n variables Xl, ... , xn •

The circuit is made up of 2ⁿ -1 cells, all equal (Figure 2), which implement the function

i i-I -

+

^i-I

Cj = C2j Xi C2j+l ^{Xi •}

The 211 inputs (Xl, ... , Xn)

*

will be indicated briefly

n

with X =

L x

i2i -¹• The binary inputs co, ... , C2"-1

i=l

are for the specialization of the circuit; to be exact each of the 2(2n

) vectors C

==

(co, ... , C2"-1) corresponds to one and only one function F(X1, ... , Xn). It is easy to show³ that, if vector X is applied to An, the output c~

coincides with the specialization bit Cx; therefore there exists a one-to-one correspondence between the minterm mj and the bit Cj (0 ~ j ~ 2n-1). A function F(xt, ... , xn) is implemented on An giving the specializa-tion bits corresponding to the minterms implicating the function values equal to 1 and leaving the rest at O.

Tests to detect fauUs in an An

In view of the regularity and the simplicity of the

(*) Xi = 0 or 1

139

~----~-;---~--T--,c •

•

---Zn-~I _L---.--q-t---t-., ~----t-.

z,, _ _ _

--t-~---+-+t

^•

.e;

F(z, •..• z,,)

Figure l-..'3tructure of the universai ceBulaI' circuit (t.e.)

Figure 2-j-th cell on level i of the t.e.

interconnections, only faults within the cells are con-sidered possible; this implies that, even when there are faults, the output of each cell always remains a function (possibly degenerate) of its three inputs exclusively. To remain on a more general plane, it will be supposed that a faulty cell can implement any of the remaining 255 functions of three variables.

This section describes a complete and minimal method of detecting faults in a tree circuit; that is, it detects all faults satisfying the above mentioned hypotheses and consists in the minimal number of tests.

Description of the tests

The test in which all terminals Co, •.• , C2n-l are fixed at 0 and the inputs take on all possible values Xo, ••• , X271 - 1 is called here "fixed 0 test" _{(0 / ),} If the tree circuit (t.c.) functions correctly, during the fixed

o

test there is a sequence of 2ⁿ zeroes in the output.

The test described in Table 1 is called here "travelling

o

test" (Ot). If the t.c. functions correctly, during this test there is a sequence of 2ⁿ zeroes in the output.

The tests here called "fixed 1" and "travelling I"

(1 I and 1 t) are obtained from the OJ and 0 ^t tests by

Table 1

x Co

^C₁ ^C₂ ^C

₃

^c "n ") ^c 2n_1

...

-"

0 0 1 1 1 1 1

1 1 0 1 1 1 1

2 1 1 0 1 1

.,

I

")

1 1 1 0 1 1

...

.)

)n_2

_{1 1 1 1 0 1}

12n

^{-1 1 1 1}

.. ^-

^{1 0}

complementing all the specialization bits. They give two sequences each of 2ⁿ ones at the output of a correct t.c.

Let us consider the set of tests 0 j, 1 j, 0 t, 1 t applied to a correctly functioning t.c. The signals at every point of the circuit are shown in Table 2.

I t can be seen- that the four tests for the whole tree correspond to the same tests carried out on the subtrees and on the individual cells according to Table 3.

Let us take as an example a tree made up of only two levels (Figure 3).

The tests are those shown in Table 4, in which it is supposed that the circuit functions correctly.

I t is then possible to constru.ct Karnaugh's map of the function implemented by each cell (Figure 4); for the sake of clarity the maps have been arranged in the same way as the respective cells.

This result can be easily extended to the case of an n-level tree. On each level the squares of the maps are

Table 2

1 1 1 2 2 2 D-' D-' ~.

X cOc,c2c)""c2D_2C2D_, coc""c2D-'_1 COC''',C2D-2_

1 ... Co c, Co p

o 0 0 0 0 ... 0 0 0 0 ... 0 0 0 ... 0 ... 0 0 0 1 0 0 0 0 ... 0 0 00 ... 0 0 " ... 0 ... 0 0 0

~:'i 0·0·0·0·:::·0 .. ·0 .... 0·0·:::·0 .. · .. ·0·0·:::·0 ... ::: 0'"0''' '0"

o

II

1 , 1 ... 1 1

l"'"

¹ 1 1 ... 1 ' " 1 1

I

¹

I

.; ^..

~. ~. ~. ~.:::. ~ ... ~

....

~. ~.:::. ~ ... ~. ~.:::. ~

... :::

~

...

~

...

~. ~

..

2 -'j 1 1 , 1 ... 1 1 I' 1 . . . , 1 1 ••• 1 ... 1 1 , 1 'I

!

3 , 1 1 1 0 ... 1

I'! ~ 1 ~ ::: ~ ~

1 ^I'

~

10 ... 1

L:: ~

^I'

^g

01 ... 1

~ ^::: ~ \' ::: Ig

... 0 1

~

^II

~

0 ^I'

·d··j ... · ... oo . . . ~ . . .

i··· .... " ..

'j" " 1 ' " ' ' ' '

+ .... ;

2D-~i 1 1 1 1 ... 0 1

i

1 1 ... 0

ill ...

^{0 ... j' 0}

1

^{0 I'}

2 -"l 1 1 1 1 ••• 1 0 1 1 ••• 0 1 1 '" 0 • •• 1 0 I)

o 11 0 0 0 ... 0 0 ! 1 0 ... 0 ! 1 0 ... 0 ... 1' ⁰ ! ¹ !

1 '0 1 00 ... 0 0 I' 1 0 ... 0 '1

1

0 ... 0

"'1"

^{0 ' 1 I'}

2 0 0 1 0 ... 0 0 01 ... 0 10 ... 0 ... 1 0 1

~ ... ~.~.~.~.:::.~ ... ~ ... ~.~.:::.~ ... ~.~.:::.~ ... ::: ~ ... ~ ... ~ .. I

2 -2 0 0 0 ., : •• 1 0 i 0 0 ••• 1 I· 0 0 '" 1 .. '10 1 1 I

2D_1 0 0 0 0 ... 0 1 I () 0 ... 1 0 \I . . . 1 ... \I 1 1

Diagrams and UtiHzation of Faulty Universal Tree Circuits 141

Figure 4-Correspondence between the tests and the entries of the cell maps

controlled in the following order (the columns are numbered from left to right):

(1) the squares of the first columns, first for Xi

=

0,

(3) the upper squares of the fourth columns and then the lower squares of the second columns, as at point (1) (0, test);

(4) the upper squares of the second columns and then the lower squares of the fourth columns, as at point (1) (It test).

Every cell on level i is tested 2 ^i-I times. It is useful for what follows to note the law for the construction of the map of a cell of level i from the maps of the two cells above of level i - I (Figure 5).

Properties of the tests

A tree ^An can be decomposed into two subtrees having n - 1 levels, A1I-I and ~-h and in its output cell. For

-e_2j i-I

The output of An is a function of the specialization bits;

in fact, if vector C is changed from (0, ... , 0) to respectively for any of the remaining 2" - 2k values of X.

Let aJ30 be another pair of values taken on by a and (3 during the 0, test. For the reasons explained previously aol31 will appear in the I, test and cannot appear in the

o

I test; similarly aJ30 cannot appear in the I, test. The following table can therefore be constructed (Table 5).

It can be seen that for x" = 0, during the 0 t test, (3 is remaining rows can be constructed, and it can therefore be affirmed that during each half of the four tests ^a and (3 remain constant.

Theorem 1: An n-level tree circuit, An, functions correctly if and only if tests 0" 1" 0 t, 1 t give the correct outputs, that is four sequences of zeroes, ones, zeroes, ones respectiveiy, each of 21> bits.

Table .j

Proof Necessity: it is obvious. Sufficiency:. according to the Lemma, if the outputs are correct a and (3 axe . constant in each of the eight half-tests. A Karnaugh map can therefore be constructed for the function of the output cell, as shown in Figure 6. The function imple-mented by this cell is therefore of the following type:

F = ^a

*

xn

+

f3* ^{Xn • (1)}

Since the outputs are correct, two possibilities may occur:

Diagrams and Utilization of Faulty Universal Tree Circuits 143 complemented output, but the output cell makes up for this defect.

In both cases for ^Xn = 0 {XII = I} the output of An reproduces that of An-1 {A~_I}' apart from complemen-tations. Therefore the maps of C~-l and of C~-l can be constructed for Xn = 0 and for Xn = 1 respectively. It is seen at once that also the functions implemented by these two cells are of type (1), and therefore the considerations made for c~ are still valid. Proceeding in the same way, we can construct the maps for all the cells of the circuit, which always implement functions of type (1). It can be concluded that circuit An functions correctly, since it has been proved that all the cells function correctly, apart from pairs of faults that cancel each oth~r out and therefore cannot influence the overall behaviour of the circuit.

Theorem 2: The set of tests 0" 1" Oe, 1 ^t contains the minimal number of tests necessary to control the functioning of a circuit An under the conditions envisaged for the faults.

Proof: In view of the structure of All and the type of faults considered, the cells on the first level are all independent of one another; it is evident, therefore, that the number of tests necessary to control them is

8.211- 1 = ^21142. This is obviously a lower limit for the number of tests referring to the whole circuit. Then, too, considering the independence of the cells of each level, the attempt can be made to organize the 2ⁿ+² tests necessary to control the cells of the first level so as to carry out at the same time the tests on all the cells of the following levels. Theorem 1 shows that this is actually possible. This is what we set out to prove.

The utilization of fauUy cellular tree circuits Fault localization

The method set forth in the preceding section also makes it possible to localize the faulty cells in a way that

will be described. As has been seen, tests 0" 1" 0 t, 1 t

make it possible to construct the Karnaugh map for the ceH at level n, and every square of the map is explored

The same output sequence is obtained if the two cells

c~ ^and c~tl ar~ faulty in the same way as ct Similarly it can be seen that 2h cells at level i - h with faults in the same squares of the maps (and all the combinations of these faults) lead to the same output sequence.

It can be concluded, therefore, that, if in one or more tests there exist as many output sequences composed of 2 ^i-I wrong terms starting from element 2k· 2 ^i-I or (2k

+

1)·2 i-I, the subtree having ci as its output cell contains one or more faulty cells. If there exist several wrong sequences not correlated in the preceding way, there exist as many faulty subtrees in the circuit.

The data supplied by the four tests do not permit a more exact localization of the faults. Then, too, it is easily seen that the number of additional tests necessary for this purpose can become prohibitive in proportion as the dimensions of the faulty subtree Ai grow. Further-more, a minimal set of these tests cannot generally be fixed in advance independently of the results of the preceding tests.

A method will be described which makes it possible, on the contrary, to use a faulty An to implement a subset of functions of n variables without further diagnostic easy to obtain the function implemented by the faulty cell. Let this function be c} = g(Xl' C2;, C2i+l)' If it is

and C2j~j+1 is a permutation, cell c} is still able to implement all the functions of Xl, and therefore An is able to implement all the functions of n variables. In all other cases the functions of Xl that can be implemented by c} and tberefore the functions of n variables that can be implemented by An can be found immediately.

Example 1: Let us consider an A3 (Figure 7). The result of the diagnostic tests is supposed to be the one shown in Table 7.

In each test one wrong isolated term is noted;

therefore the faults of the circuit are limited to the first level. Since the wrong terms correspond to X = 2 and X = 3, it can be deduced (k = 1) thattheyaiicorrespond to cell c~; the map of the function implemented by this cell is therefore that shown in Figure 8. The function impiemented by ci in iorm (2) is therefore

The equivalent specialization bits are:

C!eq = C~a c3eq = ~C3.

If---~---+--~--~~~~--+---~--~_+

Z2---~---+---~~--~+

F

Figure 7-The t.e, considered in example 1

Table 7

x _Of

1f

°t 't

0 0

¹

0

1

1

0 ,

0

,

2 1

0

1 1

3 ⁰

¹

^{0 0}

4 0

1

0

¹

5 0

1

0

1

6 0

1

0

1

7

0

1

0

1

f 1

o I

_i ¹

.xyl

^{0 0 I}

I

⁰

Figure 8-The map of the faulty cell of example 1

Owing to the correspondence between the specializa-tion bits and the minterms of the functions implemented by A3, it can be deduced that all the functions having one and only one of minterms nl2 and ms can be imple-mented. To Lrnplement a function with m~ alone the terminals can be specialized in the usual way; to implement a function with m3 alone it is necessary, on the contrary, to fix C2 and C3 both at 1.

2nd case (i

>

1): Two types of faults can be dis-tinguished as can be seen from the map of cell c;

which has

(a) one correct row.

(b) errors in both rows.

(a) If cell c~ has the map with the row ^Xi = 0 {Xi

=

1}

correct1 it can be said that subtree Ai functions cor-rectly when Xi = 0 {Xi = I} according to the considera-tions set forth in Theorem 1. The faulty tree can therefore be decomposed as in Figure 9.

When Xi = 0 {Xi = I} the output c; coincides with the output of Ai -l {~-l}' Then, too, when Xi = 1 {Xi

=

0

1

the output of c~ can be known independently of Xl, ••. , Xi-l if all the specialization bits of ~-l {Ai-I}

are fixed at 0 or at 1. This output coincides with the value of the lower {upper} square corresponding to test 0, or I, on

c).

An An with such faults can implement functions of the following type

(3)

where:

X;

= Xi {Xi} if the upper {lower} half-map is

'\ correct;

~-i is the vector (X'+l' . , " xn) direct or complemented so that c~ = cj for

X!-i

⁼ 1.

-yisdefinedinFigure.l0forxi = ^X;,; for xi = Xi,

'Y is defined in a similar way, taking into account the lower half-map; ^0';'-1 is the value common to the 2 i-I specialization bits of ~-l f Ai-I} ;

Diagrams and Utilization of Faulty Universal Tree Circuits 145

X, ---~----_+---~~~_+----~

x.

-(---~~---~~----_+

L-x·---~~--_+---~ _t,

Figure 9-Deeomposition of a fault.y tree Ai

f and g are any functions of their arguments.

They are therefore programmed on their subtrees specializing the bits in the usual way.

If there are r subtrees ~1' ^{• • • ,} ~r which show faults of this type, the proceeding is similar. The circuit can implement functions of the type:

r

F(X) =

L

^~q-iq [x;q fq(x!, ... , Xjq-l)

+

x~ 'rq]

+

q-l (4)

+ II L

r X!~ ghq(Xl, ... , Xiq) .

q=l hq~iq

In fact, owing to the structure of the tree, the first terms of Equation 3 written for' the individual faults can be implemented independently. The second terms of Equation 3 must be intersected with one another so as to obtain the residual part of An which does not belong to any of the faulty subtrees.

Example 2: Given an

At,

it is supposed that the result of the tests is as shown in Table 8.

There is a sequence 0000 in column 1 ^t for X = 0, 1, 2, 3; this implies the presence of a fault in a subtree As (2^i-1 = 22), which has cg as its output cell (k = 0).

Similarly, the two sequences 00 in tests 1 f and 1 ^t corresponding to X = 10, 11 imply the presence of a

ITIIJ ~

^y=O

[Q[]TI]

ITIIJ ^Y = ^"i-I

r1INIJ

ITIIJ )' ^{= "i-I}

[I[JZ[J

ITIIJ

^{y= f}

Figure 10-Definition of the function 'Y

Table 8

x _{Of 1f} °t ^1t

0 0

1

0 0

1

0

1

0 0

2

0

1

0 0

3

^{0 1}

⁰ 0

4 0

1

0

1

5 0

₁

0

1

6 0

1

0

1

7 ⁰

1

0

1

8 0

1

0

1

9 ⁰

¹

⁰

¹

10

0 0 0 0

1 1 0

0 0 0

12

0

1

0

1

13 0

1

0

1

14

0

1

0

1

15

0 1 0 1

fault in an A2 with c~ as its output cell. The maps corresponding to cg and c~ are shown in FigUre 11. Both have one correct row. Applying Equation 4 we obtain:

F(X) = ~ xSf1(Xl, X2)

+

xSO"s

+

J4Xs x2f2(xl)

+

X2'0

+

+

J4gl (Xl, X2, Xs) XS~~,1 (Xl, X2)

+ +

XaX~'2(Xl, X2)

+

XsJ4g2.S(XI, X2) =

= X~fl(XI' X2)

+

XaX40"S

+

X2XsJ4f2(xl)

+ +

XsJ4f(XI, Xli) .

In the last term f(Xl, X2) has been used instead of gl(XI, X2, 1) g2,S(XI, X2) since this product is any function of Xl and X2 .

.c

() ^R

.c'

₄

~

.l31 0 0

I I

^-sf ~

0 0 0 0

--;2 ^,

I .c

s

,c3

²

0

.c

2 Figure II-The maps of the faulty cells of example 2 _...

\,

(b) If the map of c) does not have a correct row, let us consider the functioning of Ai in tests 0 ^f and 1 ^f·

Since every square of the map of c; is explored 2 i - I

times co~esp~nding to all the values assumed by Xl, ... , Xi-I, the output of Ai in these tests is a function of Xi alone or is constant, according as to whether the columns of the map of c; corresponding to tests 0 ^f and If are 01, 10 or 00, 11. Therefore A1'I can implement functions of the type:

F(X) = ~-i [CTiC;(Xi)1

+

UiC;(Xi)O]

+ + L X!-i

gh(XI, ... , Xi)

h,ci

(5)

where: CT i is the value common to the specialization bits of Ai;

C)(Xi)1 and C;(Xi)O are the functions implemented by cell c; during the tests I, and 0 ^f respectively;

the gh are any fun~tions of Xl, ... , Xi and are programmed on their subtrees by specializ-ing the bits in the usual way.

In the case of r subtrees Ail' ... , Ai,. with faults of this type, we obtain:

r

F(X) =

L' xt:-'i

q [CTiq C;:(Xiq)1

+

^uiq c;:(Xiq)o]

+

q=l

(6)

r

+ II L

X!~iq ghq(Xl, .. " ^{Xiq) •}

q=l h_q,c3_q

Example 3: Let the results of the tests carried out on an A4 be those shown in Table 9. The presence of two faulty subtrees with output cells c~ and c; can be noted.

Their respective maps are shown in Figure 12.

If we apply Equation 6, we get:

F(X) = ~(CTsXa

+

usXa)

+

XsX4(U2X2

+

CT2'0)

+ +

[~gl(XI, X:;, xs)]· [XsX4g2,I(XI, X2)

+

+

XaX~,2(XI' X2)

+

X~g2,3(Xl, X2)]

= xsX4

+

CT2X2X~

+

^{x~f(xI' X2) .}

The number of the functions that can be imple-mented by a faulty circuit according to Equations 4 and 6 can be considerably increased if we admit the possibility of permutating the variables XI, ... , X1'I on the n inputs. To be exact, the number of functions that can be implemented should be multiplied by n!.

In the case of Example 2, for instance, the fUIlctions

Table 9

I x

^u

f ^If

o _t

_It

0 0 0 0 1

1 0 0 0 1

2 0 0 0 1

3

^{0 0 0 1}

4

1 1 1 0

5

1 1 1 0

6 1 1 1 0

7

^{1 1 1 0}

I

8

^{0 1 1 1 !}

9

^{0 1} I

,

1

10 0 0 0 1

11 0 0 0 ¹

12 0 ¹ 0 ¹

13

⁰ 1 0 1

14

0 1 0 1

15

0 1 0 1

,cZ

" ^.c'

⁴

m

.%"61 I I ,. 0

^I21 ~

·0 0 0 I

.cf ²

.c'

S

.c

₀ ^{3 ,£'2} ₂

Figure 12-The maps of the faulty cells of example :~

implemented are 211 = 2048; by permutating the variables in any way, they become 2¹¹·4! = 49152.

CONCLUSIONS

A diagnostic method for t.c. has been described which makes it possible to utilize faulty circuits in a simple way. The diagnostic tests for the circuit are in minimal number and can easily be carried out automatically, in view of their independence of the faults and their uniformity. In the use of faulty t.c. one or more subtrees containing the faulty cells are isolated and their specialization bits are all fixed at 0 or at 1. In this way it is not possible to TInd all the functions that the faulty

Diagrams and Utilization of Faulty Universal Tree Circuits 147

t.c. is still able to implement. However a large number of additional tests, which furthermore cannot be established in advance, would be necessary to determine the complete set of functions that can be implemented on a faulty An. Then, too, the law for giving the specialization terminals their proper values would be generally somewhat complicated.

REFERENCES

1 R C MINNICK

A. survey of microcellular research

Journal of the A C M vol 14 no 2 April 1967 pp 203-241 2 R C MINXICK

Cutpoint cellular logic

IEEE Trans vol EC-13 no 6 Dec 1964 pp 685-698 3 G CIOFFI V F ALZO~E

Ci7'cuiti cellulari con struttura ad albero

Automazione e Strumentazione vol 16 no 8 Aug 1968 pp 338-350

4 S S YAU C K TANG

Universal loy'ic circuiis and iheir modular reaiizatiorl Proc S J C C 1968

Im Dokument VOLUME 34 (Seite 153-163)