The T radic Leprechaun Computer

J. A. GITHENS

Synopsis: Leprechaun is a general-pur-po.se, stored-program, digital computer usmg more than 5,000 transistors Storage for 1,024 18-digit binary words is provided by a coincident-current magnetic-core mem-ory requiring only 160 transistors. The

l~gic of the computer is mechanized using

d.lrec~-coupled transistor logic (DCTL) clrcUltry.

Designed for use in programming and logical design research on digital computers for military real-time control applications.

Leprechaun features extreme flexibility in the logical interconnections. The computer.

also serves as a research vehicle· for the study of the operating characteristics and

relia~i1ity. o.f transistors in DCTL circuitry and l~ dnvmg a magnetic-core memory.

This paper describes the design, and con-struction of the computer.

P

ERHAPS the best starting point f~r any description of this computer is with the name, Leprechaun; it always evokes a number of questions. In keep-ing with the present trend in namkeep-ing com-puters, it should be possible by some strange cryptography to expand the let-ters of Leprechaun to obtain a lengthy, more meaningful title. However, Lepre-chaun is merely a name which was chosen in a little contest held to determine a name. The fact that Leprechaun was the only name suggested should not detract machine. Further, the dictionary re-veals that in Irish folklore a leprechaun is a little fairy generally conceived as a tricky old man, who if caught may reveal the hiding place of treasure. After about a year of struggle, we have caught our Leprechaun; although, we are still seek-ing the treasure.

Leprechaun is a solid-state digital com-puter developed under Air Force con·

tract with several definite objectives in mind. First, the computer was built to demonstrate the feasibility of a DCTL system involving^l a large number of tran-sistors and a moderate size magnetic-core memory driven by transistors. The com-puter also serves as a vehicle for

con-tinuing research and study of the operat-ing characteristics and reliability of ttan-sistors in these techniques. Second, Leprechaun was designed for use in pro-gramming and logical design research on digital computers for military real-time control applications. To meet this last objective, the computer possesses some novel featUles which permit extreme flex-ibility in the logical interconnections.

Logical Organization

Strictly speaking, Leprechaun is a special purpose computer because the word length was determined from the con-trol application. The machine handles 17 binary digits including sign. However, in all other respects, Leprechaun is a general-purpose computer. It is a single-address, stored-program machine with a 1,024-word random-access magnetic-core memory.

The operation code for the computer is quite complete; it provides all the com-mon arithmetic, logical, and transfer operations as follows:

SET ADDRESS MODIFIER

The code has been designed to eliminate the need for many of the usual red-tape Githens-The Tradic Leprechaun Computer

operations. For instance, a-special un-conditional jump operation (subroutine jump) is provided to simplify the inclu-sion of short subroutines in a program.

The first use of the operation transfers control to the desired loop in the pro-gram; the second use returns control to the point in the main program from which the jump was made. machine. Instead, Leprechaun incor-porates a simplified-address modification operation in which modification is ac-complished by direct substitution. The contents of a 5-bit address modifier reg-ister are substituted for the five least significant address digits of all instruc-tions in which these five digits are zeros.

This does not alter the stored instruction and requir€'s no tags on the instructions to be modified.

The inclusion of such operations at a modest cost for equipment saves program steps and time, items of particular im-portance in real-time control computers.

In logical organization, Leprechaun can be considered a member of the "Institute of Advanced Study" machine family for it is parallel, asynchronous, and all shifting registers and counters use the double rank technique. In general, the major units of the computer operate almost independ-ently, at their own speed, doing as much as they can until forced to stop and wait for the services of some other unit which is busy.

Direct-Coupled Transistor Logic

The logic of the Leprechaun is mech-anized· by using DCTL. DCTL is our name for the switching circuit technique in which transistors are used to perform logic as well as to provide gain. This cir-cuitry is similar to that described by Beter, Brown, Bradley, and Rubinoff of Philco at the 1955 Institute of Radio Engineers Convention, ^I and in the paper by Maddox, O'Toole, and Wong² pre-sented at this conference, except that we use alloy junction transistors for the most part. Our design philosophy and transis-tor specificationswere described in general terms by

J.

R. Harris and

J.

W. Easley. ³

J. A GITHENS is with Bell Telephone Labora-tories, Inc., Whippany, N J.

Leprechaun was developed under a program spon-sored by the Air Material Command, U.S. Air Force on Contract AF33(600)-21536

29

RI R2 ^R3

The extreme flexibility desired in the logical interconnections has led to an un-usual packaging of the computer. In this

use has been made of the unique proper-ties of DCTL. To illustrate, consider the typical DCTL circuit shown in Fig. l.

This circuit, which is actually a portion of a shift register, was chosen because it con-tains all of the commonly encountered DCTL circuit configurations. There are a number of interesting points. First, of course, is the much advertised fact that DCTL uses only two components, re-sistors and tranre-sistors, and only a single voltage sl1pply. Note that the ratio of re-sistors to tranre-sistors is about one-half.

Also, we find that adva,ntages in con-struction and flexibility of making these resistors all a single standard value out-weigh the slight circuit inefficiency. The point to note here is that there are only two basic transistor connections, the parallel and the series connection. The more sophisticated circuits are all simply combinations of these basic configura-tions. For example, the flip-flop circuit is merely two parallel circuits intercoupled.

The same circuit in a different form is shown in Fig. 2. Here it has been re-drawn to achieve complete order in the components and all the complexity that IS

the logic resides in the interconnections.

Thus, since it was just noted that any DCTL circuit can be realized using these basic configurations, this arrangement can be used to make up any desired DC-TL circuit by simply changing the inter-connections. To facilitate changing, the interconnections are made with jumpers as indicated. To reduce the crosstalk in-herent in this technology, we have de-signed our packages to minimize the com-mon emitter or ground connection.

The construction details are illustrated in Fig. 3. A ground plane is pierced with

R4

-2-VOLTS

Fig. 1 (left). Typical DeTl circuit

~ ____ ~ ____ ~ ____ ~ ____ ~~ ___ -~2~VOLTS

Fig. 2 (right). Same circuit redrawn in

different form

posts to which the transistor-emitters are solderless wrap-connected. The tran-sistor base and collector leads are each connected to two taper-pin receptacles.

Similarly, one end of each supply resistor is connected to the voltage buss, the other end to two taper-pin receptacles. This end of each supply resistor, which is a cir-cuit nodal point, is also brought out as a test point. The interconnecting jumpers use Aircraft-Marine Products taper pins.

One of these assemblies is shown in Fig. 4. It is a 3-member assembly in which the center member contains the grounded-emitter transistors, and the two identical outer members contain the' supply resistors and transistors having re-ceptacles on all three leads for use in series circuits. The ground plane runs through the middle of the center member with transistors mounted on both sides. The center member mounts 720 grounded-emitter transistors in an area of only 7 by 9.5 inches. All the points of interest in

Fig. 3. Same circuit redrawn in different form

the unit are available as test points on the outer surface of each outer member. The outer. members are hinged and swing out to give access to the wiring surfaces. In all, the package, if it can still be called that, contains 976 transistors and 504 supply resistors. It occupies less than 0.8 cubic foot, and weighs 34 pounds when fully wired. The nominal supply voltage is 2 volts, and the standard supply re-sistor value is 510 ohms giving a 4-milli-ampere current level in DCTL circuitry.

Thus, with the logic of the computer mechanized and using six of these units, with the interconnections made with jumpers which provide reliable electrical connections, yet are easily connected and disconnected, the flexibility objective has been fulfilled. The result, in effect, is a pluggable computer that can be used to test any number of logical designs and permits micro-micro-programming.

Magnetic Core Memory

Storage in Leprechaun is provided by an 18,000-bit coincident-current mag-netic-core memory driven by 160 tran-sistors. The memory is organized to store 1,024 18-digit words including a parity check bit that serves as a check on

mem-<;>ry operation only. Access to the 1,024 words is provided by coincident-voltage magnetic core-diode switches,⁴ which use 48 switch cores and 160 diodes.

The cores were developed, manufac-tured, and assembled to our specifications by the International Telemeter Corpora-tion. The digit planes are rectangular folded arrays of 64 rows of 16 cores each as shown in Fig. 5 (a portion of this photograph has been enlarged to show the core details). Eighteen planes are as-sembled into a three dimensional array which occupies less than 0.9 cubic foot as shown in Fig. 6.

The core material used resembles the S3 ferrite material and switches in slightly less than 4 microseconds on a current of

Fig. 4. Three-member assembly

360 milliamperes. We make use of Inter-national Telemeter's system of staggered read drives⁵ in which the read current ap-plied to the columns (the long dimensions Qf the rectangular planes) precedes the read current applied to the rows. This allows the larger disturbance caused by the column drive to die out before the row drive is applied. We use a stagger of 2 microseconds and obtain a very good Qne to zero ratio. A measure of the one to zero ratio is provided by the fact that the memory operates over a temperature range of 50 to 100 degrees Fahrenheit with good margins and without any adjust-ment or compensation. Using this core material and the staggered drives we achieve a 20 microsecond read-write

<cycle.

To provide the read and write drives, to inhibit the writing action in those digit planes where zeros are to be written, and to set the access switches, the memory uses 62 two-stage transistor amplifiers.

These circuits amplify the DCTL inputs to provide drive currents ranging from 70 to 200 milliamperes. In addition, 36 transistors are used in two-stage read amplifiers to raise the 18 parallel output signals to a sufficient level to drive DCTL circuitry. This memory system was de-scribed in detail by E. L. Younken.⁶ Power Supplies

In keeping with the rest of the com-puter, the power supplies are solid-state circuits also. Basically they are fast mag-J.1etic:; ,regul,ators, using _transistorized drivers. The coincident-current opera-tion of the magnetic-core memory places some rather severe requirements on the supplies. For example, the 8±2 volt supply for the memory has a static reg-ulation of ± 1

%

(per cent) for an output current range of 0 to 1.8 amperes and its dynamic regulation is less than ±3%

under a pulsing load of 1.6 amperes. This is a high performance supply and yet, as shown in Fig. 7, it is a very small unit, occupying less than 0.2 cubic foot.

The DCTL portion of the computer operates at - 2 volts and dissipates about 20 watts. Of this figure, less than 2.5 watts are dissipated in the transistors.

The memory uses two voltages, - 22.5 and - 8 volts, and dissipates about 48 watts. By way of contrast, roughly 50 indicator lamp circuits, which operate from a 5 volt supply, dissipate 10 watts.

This adds up to a total dissipation of 78 watts and, with the power supplies 50%

efficient, the input power is only about 160 watts, slightly more than your home television receiver uses.

Components

One of the advantages of DCTL is the drastic reduction in the number of com-ponents; excluding the magnetic cores, Leprechaun uses only on the order of 9,000 electrical components. More than half of these are transistors. The com-puter actually contains more transistors than this because, with the DCTL pack-aging used, it is very difficult to remove and replace transistors. Therefore, extra transistors are packaged right in the as-semblies to be used for future expansion in keeping with the flexibility requirement and to serve as spares in the event of fail-ures. The fact that such a technique was used willingly indicates our confidence in the reliability of transistors in gen-eral and in DCTL circuitry in particular.

For DCTL p-n-p germanium alloy junction transistors with 7 -megacycles alpha cutoff selected to our DCTL speci-fications are used. The computer con-tains three varieties: selected Raytheon CK761 transistors and two codes of selected General Electric 2N137 tran-sistors. The yields of these transistors to Githens-The Tradic Leprechaun Computer

Fig. 5. Memory digit plane

our specifications are 35 to 40% for the 2N137 and 50 to 60% for the CK761. To a looser specification, which necessitates some circuit limitations, the yields are in-creased to about 80% for the 2N137.

The CK761 transistors selected to this looser specification would give practically 100% yield. Roughly 6% of the DCTL transistors are selected Philco Surface Barrier SBI00 transistors. The greater speed of these units is used in those places where accurate timing is impor-tant, e.g., the timing relation between memory read drives and the strobe. To develop the high current drives required in the memory, the computer uses West-ern Electric GA52830 transistors.

,The Computer' Assembly

Now that all of the major components of the computer have been discussed, what does a complete Leprechaun look like? A front view of the computer is shown in Fig. 8. The upper portion of the front of the machine is occupied by the control panel. At this point provision is made to display the contents of all reg-isters in the machine and the state of the critical control flip-flops. The control panel also contains all the manual control switches and selectors. For program de-bugging and trouble shooting purposes, provision is made for manually setting of the registers and control flip-flops and for a manual break-point setting.

The lower portion of the front of the machine is occupied by the power supply control panel. This panel contains the power supply adjustments, current and voltage test points, and the fuses. A hinged panel which contains the mar-ginal checking equipment is shown in the lowered position. This panel contains switches that divide the DCTL portion of the computer into 36 parts for marginal checking purposes.

31

Fig. 6. Memory storage array

Fig. 9 shows a side view of the com-puter with the cover removed. Directly behind the control panels are mounted the eight power supplies used by the com-puter. The six DCTL assemblies are mounted behind these. One of the as-semblies is shown open giving access to the interconnecting wiring. The memory ar-ray is mounted above the DCTL section.

The associated transistor circuitry is located about the array on printed circuit plug-in cards.

In all, the computer occupies slightly over 15 cubic feet. This is the complete computer with the exception of input-out-put equipment. In their normal use, con-trol computers must accept analog inputs and produce analog outputs for the most

Fig. 7. Power supply unit

32

part (with intermediate conversion, of course). To make Leprechaun useful for programming research, however, it is pro-vided with paper-tape input and output equipment. The primary input is a Ferranti photoelectric reader and the pri-mary output is a Teletype high-speed punch. A manual keyboard for input and an electric typewriter for output are provided for optional use.

Summary

Leprechaun is a special-purpose, low-power, solid-state, digital computer hav-ing general-purpose capability. The ex-treme flexibility permitted by the design makes the computer an ideal test bed for

Fig. 8. Front view of computerl cover on

logical design innovations. The present operation code makes the computer very versatile. However, should it ever prove inadequate, the operation code can be expanded or modified with comparative ease. Finally, I should say that Lepre-chaun is a good example of the impact that transistors and solid-state devices are having on the computer art.

lt must be obvious that a project of this nature is the work of many people from several departments of the Bell Tele-phone Laboratories. Some of the people instrumental in the program were men-tioned in the text. Menmen-tioned but un-named was our logical designer, R. A.

Fig. 9. Side view of computerl cover off

Kudlich, who was responsible for the sys-tem and logical design, but will probably be remembered longest for contributing the name Leprechaun.

References

1. SURF ACE BARRIER TRANSISTOR SWITCHING CIRCUITS, R. H. Beter, R. B. Brown, W. E.

Bradley, M. Rubinoff. Convention Record, Insti-tute of Radio Engineers, New York, N Y , pt IV, Mar. 21, 1955, pp. 139-45.

2. EASTERN JOINT COMPUTER CONFERENCE AlEE Special Publication T-92. "The Transac S-1000 Computer," J. L. Maddox, J. B. O'Toole, S. Y. Wong. May 1957, pp 13-16.

3. DIRECT-COUPLED TRANSISTOR LOGIC CIR-CUITRY IN DIGITAL COMPUTERS, J. R. Harris.

TRANSISTOR REQUIREMENTS FOR DIRECT-COUPLED TRANSISTOR LOGIC CIRCUITS, J. W. Easley. Joint IRE-AlEE Transistor Circuits Conference, Phila-delphia, Pa., Feb. 1956.

4. PULSE-SWITCHING CIRCUITS USING MAGNETIC CORES, M. Karnaugh. Proceedmgs, Institute of Radio Engineers, New York, N. Y., vol. 43, 1955, p.570.

5. RECENT ADVANCES IN COINCIDENT CURRENT MAGNETIC MEMORY TECHNIQUES, R. Stewart-Williams, M. Rosenberg, M. A. Alexander. Pro-ceedings, Association for Computing Machinery, Ann Arbor, Michigan, June 1954.

6. A TRANSISTOR-DRIVEN MAGNETIC-CORE MEM-ORY, E. L. Younker. Transactions, Institute of Radio Engineers, New York, N Y , vol. EC6, no. 1. Mar. 1957.

---+---Discussion

V. Sferrino (Lincoln Laboratory, Massa-chusetts Institute of Technology): Do you contemplate the design of an all-transistor memory using SI cores which require higher drive currents but which switch faster than the S3 cores?

Mr. Githens: I think that we will un-doubtedly get to it because of the ever pres-ent need for faster operation. The S3 Corpora-tion): Do you feel that the DCTL technique is superior in all respects to standard im-plementations? If not, would you discuss limitations you have encountered?

Mr. Githens: The answer to that must be a qualified yes. Yes, if speed is not of pri-mary importance. The greatest attraction of DCTL is its simplicity, reduction in number of components, and reliability.

Several systems have been described this afternoon, each of which proposes the use of thousands and thousands of transistors.

Undoubtedly, larger systems will be built.

If systems of this size are to be practical, the circuits used must be simple so that they

If systems of this size are to be practical, the circuits used must be simple so that they

Im Dokument JOINT COMPUTER (Seite 35-40)