Scintillating Fibre Detector Impact on Momentum Resolution and Re-

The possibility of additional suppression of Bhabha background and rejection of mis-recon-structed track candidates due to the time information from the fibre detector comes with ex-tra material in the experiments active volume. This material causes significant scattering which impacts the experiment’s momentum resolution and reconstruction efficiency. Fig-ure 10.7 shows the momentum resolution as a function of the fibre ribbon thickness. Motiv-ated by the improved momentum resolution of long 6- and 8-hit tracks, due to their recurling, only such tracks are used in the default analysis. The effect of the additional material of the fibre detector is more pronounced for 6-hit than for 8-hit tracks. At a detector thickness of 0.9 mm, the momentum resolution of 6-hit track degrades by (31±1) keV/c, corresponding to (19.4±0.6) %, whereas the resolution of 8-hit tracks degrades by (22±1) keV/c, corresponding to (12.2±0.6) %.

The momentum resolutions of the single tracks combine to the resolution of invariant mass of a signal candidatem_eee. Figure 10.8 shows the resolution of m_eee and the relative recon-struction efficiency of signal events as a function of the fibre ribbon thickness. The relative reconstruction efficiency is stated with respect to the absence of the fibre sub-detector for sig-nal selection as described in section 10.2. Only long tracks, e.g. 6- and 8-hit tracks, are used.

The signal resolution and relative reconstruction efficiency show a linear behaviour in the rib-bon thickness which is proportional to the scattering. For a fibre ribrib-bon thickness of 0.9 mm,

10.3. IMPACT OF THE SCINTILLATING FIBRE DETECTOR

0.60 0.65 0.70

signal resolution  (2m) [MeV/c]eee

0.0 0.5 1.0 1.5 2.0

ribbon thickness [mm]

0.8 0.9 1.0

relative  reconstruction efficiency

Figure 10.8:Signal resolution in terms of the invariant mass of the three tracks of a candidatem_eee (top) and the relative reconstruction efficiency (bottom) with respect to the absence of the fibre de-tector as a function of the fibre ribbon thickness. The planned ribbon thickness∼0.9 mm is high-lighted. The signal resolution is stated for signal selection as summarized in section 10.2.

the signal resolution degrades by (62±1) keV/c², which corresponds to (10.8±0.2) %.

Based on this studies, the upper limit of the fibre detector material budget of 1 mm plastic scintillator was set.

CHAPTER 10. TIMING IN THE RECONSTRUCTION AND ANALYSIS FRAMEWORK

Part IV

DAQ and Integration

11 _MuTRiG

The analogueSiPMsignals from the fibre sub-detector are digitized by the custom mixed-mode

ASICMuTRiG developed by the Kirchhoff Institute for Physics at the University of Heidelberg in the scope of the Mu3e experiment. section 6.3 gives an detailed description of theASIC.

In this chapter, the performance of prototypes described in chapter 7 is confirmed in a setup where the sensors are read out by MuTRiG. In a first part, this setup andDAQsystem developed in the scope of this thesis to readout fibre ribbon prototypes with this ASICare presented.

Followed by an outline of the measurement and analysis procedure which can be understood as a user’s guide. The performance of the fibre ribbon prototypes read out by MuTRiGASIC, in the following also called simply MuTRiG, is discussed in the last part.

11.1 MuTRiG Setup and DAQ

The utilized MuTRiG setup is developed by KIP¹ at the University of Heidelberg, the same group that also designed theASIC. More details can be found in [122, 144, 145]. To test the MuTRiG in the scope of the Mu3e scintillating fibre detector an adaptor to the same setup as used with theDRS4readout (see chapter 7) was used.

A customDAQ FPGAboard, also developed at KIP, called Flyspy is available. It provides a USB 2.0 basedDAQfor STiC and MuTRiG comprising a Cypress EZ-USB FX2LPTM micro-controller. The acquisition rate with the default firmware is limited toO(300 events/s), which was increased up toO(700 kevents/s) in the scope of this thesis. In principle it is possible to buffer the events on theFPGA, hence acquire data as long as this buffer is not full, followed by a longer readout cycle.

Since the data acquisition for the Mu3e scintillating fibre detector requires thresholds at the single photon level, the fullSiPM dark rate needs to be digitized. This results in a few 100 kevents/s per channel. Furthermore, MuTRiG is designed to handle up to 1.1 Mevents/s per channel. The FlyspyDAQis not suited for such data rates. Hence, a MuTRiGDAQutilizing

1Kirchhoff-Institute for Physics.

CHAPTER 11. MUTRIG

Figure 11.1:Diagram of theMuTRiGsetup for fibre ribbon characterization. The analogue sig-nals ( ) from theSiPMarrays from both fibre ribbon sides are connected via adapter boards to the MuTRiGhosted by theMuTRiGboard. TheMuTRiGmother board provides theASIC’s supplies in-cluding the 625 MHz ( ) reference clocks. A 1.25 GbpsLVDSlink ( ) connects the chip with theFPGA

which is located inside theDAQcomputer. They communicate through aPCIe( ) interface. TheFPGA

providesSPIandI²Cslow control for the readoutASICand clock chip ( ), as well as a 125 MHz sys-tem reference clock ( ).

the collaboration’s Peripheral Component Interconnect Express (PCIe) based Direct Memory Access (DMA) developments has been realized in the scope of this thesis to read out fibre ribbon prototypes with MuTRiG at thresholds below one photoelectron. At the same time, thisDAQ

system is a foundation for the development of the scintillating fibre detector’s front end board firmware in the experiment. Thus, aMIDAS(see subsection 2.6.1) based approach was chosen because this system will be used by the Mu3e experiment.

An overview of the MuTRiG setup with the above described DAQsystem is given in Fig-ure 11.1. The analogue signals fromSiPMarrays attached to both fibre ribbon sides are con-nected via adapter boards (see subsection 11.1.3) to the MuTRiG hosted on a carrier board.

The MuTRiG mother board (see subsection 11.1.2) provides theASIC’s supplies. The readout chip’s data and slow control links are connected to theFPGAwhich is located inside theDAQ

computer. AnPCIeinterface is used for communication between them (see subsection 11.1.4).