Room Temperature Grown Interface

In chapter 3, 4, and 5 the structure and the electronic properties of the ideal Fe/GaAs(110) interface have been investigated and the importance of metal-induced gap states and bond polarization models has been discussed. The ideal Fe/GaAs(110) interface is grown at low temperature (LT) as decribed in section 2.3. In order to understand the relevance of the ideality of the interface with regard to the influence on the Schottky barrier (SB) height and the charge distribution at the interface, it would be of great interest to investi-gate the same interface with a higher degree of disorder. As discussed in section 1.6 a higher degree of intermixing is achieved at higher growth temperatures. Furthermore, density functional calculations for a low (sub-monolayer) Fe coverage on GaAs(110) predict a penetration of the Fe atoms into the semiconductor surface [80]. Therefore, in this section a Fe/GaAs(110) interface is prepared by growing about 0.4 ML Fe at room temperature (RT) on top of a clean GaAs(110) surface right after the first cleavage at a base pressure of p < 5 ⋅ 10^-11 mbar. After waiting for about 1 hour, additional 6.6 ML Fe are grown at RT on top of the surface so that the overall thickness of the Fe film amounts to 7 ML. After the second cleavage perpendicular to the first one, the sample is investi-gated by means of cross-sectional STM.

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Figure 6.1: 9 x 9 nm² constant current topography along a RT grown Fe/GaAs(110) inter-face. The setpoint values are 𝑉𝑉_𝑠𝑠=−1.5 V and 𝐼𝐼_𝑇𝑇 = 50 pA. The red dashed line indicates the position of the interface.

Figure 6.1 shows a constant current topography of the RT grown Fe/GaAs(110) interface taken at a negative bias voltage. In comparison to the LT grown interface in Figure 3.4, the RT grown interface is not as abrupt but rather frayed and significantly more As vancancies along the entire interface are found. As already mentioned in section 3.1.2, Winking [47] suggested that the occurrence of As vacancies might be explained by the strong Fe-As bonds and the ductile cleavage behavior of the Fe film during the second cleavage process. However, Siewers [127] conducted cross-sectional STM studies at the n-GaAs(110)-(11�0) edge without Fe film and also found sporadic As vacancies along the edge suggesting the second cleavage process itself being the reason for the As vacan-cies. Nevertheless, the representative STM topography in Figure 6.1 shows that the con-cenctration of As vacancies at the interface is significantly larger for the RT grown inter-face than for the LT grown interinter-face or the GaAs(110)-(11�0) edge without Fe film.

Therefore, the Fe growth at RT seems to have changed the atomic structure at the inter-face with respect to the ideal interinter-face. One possible explanation could be of similar qual-ity as the one suggested by Winking [47] considering the strong Fe-As bonds: In the case of submonolayer RT growth one expects the penetration of Fe atoms into the GaAs(110) surface as predicted in DFT calculations by Grünebohm et al. [80] which are illustrated in Figure 1.9 in section 1.6. This creates a strong bond between the penetrating Fe atom and an As atom and cracks the bond between the Ga and the As atom in the surface layer. The subsequential Fe overgrowth might then bind the As atom in the interface layer very strongly to the Fe film which would increase the probability that the As atom is removed together with the ductile Fe film during the second cleavage process. Here a more ad-vanced DFT study with a mixture of penetrating Fe atoms and a Fe film overgrowth might yield more clarity concerning this question.

6.1 Room Temperature Grown Interface

77 In order to learn more about the SB height and the charge distribution at the RT grown interface, the interface is investigated by means of cross-sectional STS. The correspond-ing STS spectra along the space charge region for negative bias voltages are shown in the upper panel in Figure 6.2 and are plotted in the same convention as in sections 4.2 and 4.3. The black dots and the colored solid lines represent experimental constant current isolines and 3D FEM simulated constant Φ_{𝑉𝑉𝑇𝑇} isolines, respectively.

Figure 6.2: (upper panel) STS spectra across a RT grown p-type Fe/GaAs(110) interface for negative voltages taken at 𝑇𝑇= 6 K with set-point values of 𝐼𝐼_𝑇𝑇 = 150 pA and 𝑉𝑉_𝑠𝑠=

−1.5 V. Interface is located at 𝑥𝑥= 0 nm. The best fit between the experimental and simu-lated isolines deepest inside the valence band is obtained for a SB height of Φ_{𝑆𝑆𝑆𝑆}^𝑝𝑝 = 0.74 eV and a contact potential difference of 𝑉𝑉_{𝐶𝐶𝑃𝑃𝐷𝐷}=− 0.31 V. The solid yellow isoline represents the valence band maximum. (lower panel) Corresponding LDOS variation map.

At around 𝑥𝑥 ≈ −19 nm the experimental constant current isolines exhibit a “hump” with respect to the simulated isolines which is due to a Zn acceptor in proximity. At 𝑥𝑥 ≈

−4 nm the experimental isolines show a small dip which is due to a tip modification. To obtain the SB height the simulated isolines are fitted to the constant current isoline deep-est inside the valence band (starting at a sample bias voltage of 𝑉𝑉_𝑠𝑠=−0.75 V) as de-scribed in section 4.2. The best fit is obtained for a SB height of Φ_{𝑆𝑆𝑆𝑆}^𝑝𝑝 = 0.74 eV and a contact potential difference of 𝑉𝑉_{𝐶𝐶𝑃𝑃𝐷𝐷}=−0.31 V. Furthermore, inside the band gap (the solid yellow line indicates the valence band edge) an additional tunnel current is observed as it has been observed for the ideal interface in Figure 4.10 in section 4.3 as well.

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The LDOS variation map is obtained in the same way as described in section 4.3. The LDOS variation map for the RT grown interface is shown in the lower panel in Figure 6.2. One noticeable feature is the increase of LDOS inside the valence band with respect to the free surface at around 𝑥𝑥 ≈ −19 nm which is due to the charged acceptor in proxim-ity. Even more striking is the fact that at the RT grown interface there is no sharp de-crease of LDOS observed inside the valence band. Taking into consideration the LDOS model from Figure 5.5 in section 5.2, this observation can qualitatively explain the slight decrease of the SB height observed for the RT grown interface (Φ_{𝑆𝑆𝑆𝑆}^𝑝𝑝 = 0.74 eV) with respect to the LT grown interface (Φ_{𝑆𝑆𝑆𝑆}^𝑝𝑝 = 0.78 eV). A more detailed discussion in this regard follows in section 6.3. Similar LDOS variation maps are found along the entire RT grown interface so that the map in Figure 6.2 has a representative character. In contrast, the LT grown ideal Fe/GaAs(110) interface exhibits a sharp drop of LDOS starting about 0.35 eV below the valence band edge (see Figure 5.2) which is explained by a strong Fe-As hybridization at the interface as suggested by DFT calculations (see section 5.1). From that it can be concluded that the growth temperature has a significant impact on both the atomic structure of the Fe/GaAs(110) interface and the hybridization between Fe and As atoms at the interface. For the RT grown interface the degree of intermixing is increased and the impact of Fe-As hybrization on SB formation seems to be decreased with respect to the LT grown interface.