4-45. The procedures given in the preceding paragraphs used three memory reference instructions: LDA 3001;
ADA 3777,1; and STA 3000. All of these instructions were stored in the second page of memory; Le., they were stored in iocations 2774, 2775, and 2776. In addition, the ad-dresses to which these instructions referred (3001, 3777, 3000) were also located in the second page of memory.
Thus each memory reference is a "current page" reference;
i.e., no reference is made to an address which is outside the page in which the program itself is operating.
4-46. One program reference (ADA 3777,1) went to the page limit. This instruction could not have been ADA 4000,1, which refers to a location just one address higher.
Location 4000 is not on the current page. On the other hand, ADA 1777 (with or without I) is possible, even though location 1777 also is not on the current page. The following paragraphs, through 4-62, deal with the special considerations for referencing memory pages other than the current page. The first step is to know what constitutes a page of memory.
4-47. CONCEPT OF THE MEMORY PAGE.
4-48. The necessity for dividing memory into pages arises from the fundamental design concept of combining
Section IV the instruction code and the memory reference into one computer word. This contributes to speed and efficiency in the computer, but also limits the number of bits available for the memory reference. Bits 0 through 9 of the memory reference instructions are available for the memory address.
Refer now to table 4-4 and note under the "Memory Reference Bits" column that the possible range of numbers using these bits is (in octal) 0000 through 1777. To form addresses any higher than 1777 requires the addition of bits listed under the "Page Bits" column.
4-49. In the computer, a reference to memory is implemented by transferring bits 0 through 9 of the instruction word from the T-register to the M-register during the fetch phase. The remaining bits, during the fetch phase, stay at the value present before the fetch phase began. (Optionally, these bits can be reset to zero for a reference to page 0; this is relatively simple to accom-plish internally.) Thus the programmer must know if these bits currently agree with the corresponding bits of the address he wishes to reference. To assist the programmer in this task, the convention is established of dividing memory into blocks called "pages". Each block contains 2000 (octal) memory locations (or 1024 decimal). This block size is determined by the range of direct addressing capability (0000 through 1777), and each such block is assigned a
"page number".
Table 4-4. Memory Pages
COMPLETE BINARY ADDRESSES (M-REGISTER)
PAGE OCTAL
NO. ADDRESSES PAGE BITS MEMORY REFERENCE BITS
0 00000 (*) 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
01777 n n n v v v n V n V 1 J. 1 J. 1 .l 1 .l 1 1 1 1 1 1
1 02000 0 0 0 0 1 0 0 0 0 0 0 0 0 0 0
03777 0 0 0 0 1 1 1 1 1 1 1 1 1 1 1
2 04000 0 0 0 1 0 0 0 0 0 0 0 0 0 0 0
05777 0 0 0 1 0 1 1 1 1 1 1 1 1 1 1
3 06000 0 0 0 1 1 0 0 0 0 0 0 0 0 0 0
07777 0 0 0 1 1 1 1 1 1 1 1 1 1 1 1
4 10000 0 0 1 0 0 0 0 0 0 0 0 0 0 0 0
11777 0 0 1 0 0 1 1 1 1 1 1 1 1 1 1
5 12000 0 0 1 0 1 0 0 0 0 0 0 0 0 0 0
13777 0 0 1 0 1 1 1 1 1 1 1 1 1 1 1
6 14000 0 0 1 1 0 0 0 0 0 0 0 0 0 0 0
15777 0 0 1 1 0 1 1 1 1 1 1 1 1 1 1
7 16000 0 0 1 1 1 0 0 0 0 0 0 0 0 0 0
17777 0 0 1 1 1 1 1 1 1 1 1 1 1 1 1
"'Direct/Indirect bit does not form part of an address.
4-9
4-50. Identification of page numbers is simplified by considering the 5 page bits (see table 4-4) as a separate binary word. Thus 000002 is page 0; 000012 is page 1;
000102 is page 2; etc. Going back to the problem example in paragraph 4-46 (where it was stated that the ADA in-struction in location 2775 could not reference location 4000), the situation can be analyzed as follows:
a. Current address is 000010 111111101 (02775).
b. Page number (first five bits) is 000012 (page 1).
c. Desired reference is 000 100 000 000 000 (04000).
d. Page number (first five bits) is 000102 (page 2).
4-51. The desired reference requires a page change, or, in other words, bits 10 through 15 of the M-register must be altered, in addition to the usual alteration of bits 0 through 9. To do so requires use of a programming technique described under paragraph 4-55 (indirect references). A simpler technique of addressing another page (limited to page 0 only) is discussed first in the following paragraph.
Figure 4-5 illustrates both methods by showing individual memory cells which are addressable from a location on page 1. This source location may be thought of as location 2775, the same example as in the preceding discussions. Page 1 is the current page.
DIRECT INDIRECT PAGE
o
2
3
2106-16
LOWER 4K
PAGE
•
45
•
6
•
7
•
UPPER 4K
Figure 4-5. Direct and Indirect References to Other Pages
4-52. DIRECT REFERENCES.
4-53. The arrows going left from "location 2775" in figure 4-5 show that, without using an indirect address, an instruction at this point can reference a location on either the current page or page O. This doubles the range of pos-sible references for instructions which are located on any page other than page O. Bit 10 of the instruction word is reserved for distinguishing which page is referenced (zero for page 0, or one for current page). This distinction must always be considered when coding any memory reference instruction, or an erroneous reference may be made. The 4·10
memory reference bits alone are not sufficient to identify a location. For example, ADA 5777 and ADA 1777 (assuming that the program is operating in page 2) have identical memory reference bits:
ADA 5777:
o
10001(1111111111) ADA 1777:o
10000(1111111111)4-54. Only bit 10, the zero/current indicator, can make the distinction. The "C" in the Consolidated Coding Table is a reminder that bit 10 must be coded a one when refer-encing current page. Otherwise it must be a zero for all memory reference instructions. Remember that bit 10 of the instruction word is not an address bit. Its function is to control bits 10 through 15 of the M-register: to either reset these bits to zero, or leave them alone. This provides an easy, direct access to information on page 0 from any other page, thus making page 0 useful for storage of data. Pro-grams are generally stored on other pages (as the examples in this section are) in order to reserve page 0 for infor-mation which may be referenced frequently.
4-55. INDIRECT REFERENCES.
4-56. The arrows going right from "location 2775" in figure 4-5 show that, by using an indirect address in the first referenced location, any location in memory can then be accessed. As in the preceding paragraph, the initial refer-ence (contained in the instruction word), can refer to a location on either the current page or page O. Broken lines in figure 4-5 indicate this optional choice. Either way, the initial reference is simply an intermediate step to the final desired reference. Obviously an added machine operation (indirect phase) is required, as well as the added memory location. The means of telling the computer that this additional step is desired is to code a one in bit 15 of the instruction word. An "I" in the Consolidated Coding Table is a reminder to do this.
4-57. PROGRAM EXAMPLE.
4-58. Table 4-5 lists a program illustrating both a direct reference to page 0 and an indirect reference to page 2. As before, the program itself operates approximately in the middle of page 1. This program differs from that of table 4-2 in that the data, instead of being stored on the current page (location 3001), now appears in two different loca-tions: location 1001 on page 0, and location 4000 on page 2. Figure 4-6 shows in simplified form the referencing accomplished by this program.
4-59. LOADING THE PROGRAM. Unless memory has been disturbed, the program of table 4-5 can be loaded by making a few changes to the existing conditions of the computer on completion of the preceding procedures. (The reader, at this point in the text, should be able to load a complete program, given octal addresses and octal-coded contents; refer back to paragraph 4-33 if necessary.) Changes req uired are:
a. Load location 002774 with contents 06100l.
b. Load location 003777 with contents 004000.
Model 2116C Volume One
c. Load location 004000 with contents 000005.
d. Load location 001001 with contents 000005.
4-60. DIRECT REFERENCE. Set the Switch Register to the starting address (002774), and press LOAD ADDRESS.
Remembering that only bits 0 through 9 of the word about to be read out of memory are transferred to the M-register, watch bit 10 of the M-register and press SINGLE CYCLE once. Bit 10, a page bit, has changed from a one to a zero, thus changing pages. This situation is shown in figure 4-6, where the instruction word in location 2774 is causing location 1001 to be addressed. The contents of location 1001 is known to be "5"; this will be loaded into the A-register in the next (execute) phase. Again watch bit 10 of the M-register and press SINGLE CYCLE. The page indication returns to page 1 to address the next instruction (in 2775), and the data (octal 5) is in the A-register.
Referring to figure 4-6, an instruction on page 1 has commanded data from page 0 (by direct reference) to be put into the A-register.
4-61. INDIRECT REFERENCE. It was previously pointed out that a direct reference from location 2775 to 4000 is not possible. The method for making an indirect reference is to make an initial reference to a location on the current page, pick up a 15-bit address there, and use that address to reference location 4000 (refer to figure 4-6).
Although the initial reference could be anywhere on the current page or page 0, location 3777 (which is imme-diately adjacent to location 4000) has been chosen to emphasize the concept of page boundaries.
4-62. Watching bits 11 and 10 of the M-register, press SINGLE CYCLE. These bits remain 012 (page 1) for the initial reference to location 3777 on the current page. Note that the computer has acknowledged the fact that indirect addressing is desired, since the INDIRECT light is on; this condition was specified by a one in bit 15 of the instruction word (now visibie in the T-register). Again watching bits 11 and 10 of the M-register, press SINGLE CYCLE. These bits change to 102 (page 2) for the indirect reference to location 4000. Since bit 15 of the T-register is now a zero (not "indirect"), the EXECUTE indicator lights. This
Section IV
IIPnAGE IDATA)
I
LI-_l~Ol ----illi
11 ~R~G:AMI
(REF)I
3777i~
- - - + .... - - - }
I
I
~-
[OATA[ I2774 2775
ADD 5 INDIRECT LOAD 5 DIRECT
A- REG ISTE R 1L--0_o_o_o_o_o_o __ o_oo __ O_O_l _ _ Ol_O--,!
02116-A-35
Figure 4-6. Examples of Interpage Referencing
II I I I
means that the next phase will execute the instruction, and the M-register will return to page 1 for the next instruction.
Watching bits 11 and 10 of the M-register, press SINGLE CYCLE. T'nese bits return to 012 to address iocation 2776.
The remaining actions are the same as in table 4.3, steps 6, 7, and 8. Press SINGLE CYCLE three more times to complete the program.
4-63. JUMPS.
4-64. In all previous examples, although random refer-ences to various points in memory were made, the program itself (Le., the list of instruction words) was located in a few consecutive locations in page 1. This strict sequential operation would be severely limiting for practical appli-cations. Therefore provision must be made for the program to move freely throughout available memory. The jump instructions (JMP and JSB) provide this capability.
Table 4-5. Program for Interpage Referencing
ADDRESS
002774 e02T7S ,; 002776 002777
~~ > . 003000
003777 004000 001001
Ii
III
INSTRUCTION (OR DATA)
LDA ADA STA HLT·
4000 5 5
CONTENTS REMARKS
MEMORY
REFERENCE 011 AlB Z/C
I
I
OCTAL CODE
1001
3777
·:3(}O(}:·
061001 Get augend from page Zero, put in A.
... ·C 14377!r ; . Add the addend specified by 3777 ~ :
·C" "073000; .. ·· '·.ut ;@swel'i~3GoQ~· .
102000.: . . .. t.: .,
,.
004000 000005 000005
~seTv~
lor; answer
~.
Address of addend is 4000.
Data (on Page 2).
II
Data (on Page 0).4·11
4-65. The essential difference between these two instruc-tions is that the JMP (Jump) instruction unconditionally suspends operation at the currently used area of memory and continues operation in a new area, whereas JSB (Jump to Subroutine) provides a means of "remembering" the location where the jump command was given, thus enabling a return to that point at some later time. Table 4-6 illus-trates both kinds of jumps by treating the program pre-viously developed (add 5 + 5) as a subroutine, and adding a few preliminary instructions. These preliminary instructions represent the "main program"; for simplicity of instruction, several NOP (No Operation) instructions are inserted to represent a more lengthy sequence of working instructions.
4-66. The special considerations for referencing other pages, as covered in the preceding discussion, apply to the jump instructions. This means that the program can jump directly to any location on either current page or page 0, or indirectly to any location in memory. The program example in table 4-6 illustrates both a direct JMP and an indirect JMP, but only a direct JSB. An indirect JSB occurs in the same way as does the indirect JMP.
4-67. LOADING THE PROGRAM. If memory remains undisturbed from preceding procedures, the new program can be loaded simply by loading the "Octal Code" contents into the corresponding "Address" for those items not shaded in table 4-6. Otherwise it is necessary to load all 15 addresses listed in the table. Note that LOAD ADDRESS must be used three times, since three separate areas of memory are being loaded.
4-68. THE JMP INSTRUCTION. Set the Switch Register to the starting address (002100), and press LOAD ADDRESS. Assume that a working program has been running sequentially up to this point (i.e., the P-register
increments by one on completion of each instruction). For example, watch the P-register and press SINGLE CYCLE.
This causes execution of the first NOP instruction, and advances the P-register from 002100 to 002101. In location 2101 is the instruction to jump to location 2200. Since a direct jump is a one-phase instruction, the jump will be completed in the next operation. Watch the P-register and press SINGLE CYCLE, noting that the indication does not increment by one, but rather jumps from 002101 to 002200. If the intervening locations had contained instruc-tions, those instructions would be omitted from the sequence of this program. Press SINGLE CYCLE two more times, and note that the P-register increments normally from the new operating point of 002200.
4-69. THE JSB INSTRUCTION. The P-register is now at the location (2202) which contains the instruction to jump to the subroutine which begins at location 2773. This sub-routine, as the Remarks column states, is a procedure to add 5 plus 5. It is desired, upon completion of the sub-routine, to return to the main program at the succeeding location (2203). It happens that the HLT instruction is located in 2203, but a program-continuing instruction could as well be stored there, and the program (P-register) would advance as usual to 2204, 2205, etc.
4-70. The JSB instruction, unlike JMP, requires two phases. The first phase (fetch) only references the location being jumped to; i.e., the P-register does not change in this phase. Watch the M-register and press SINGLE CYCLE noting that location 2773 is referenced, but the P-register still "remembers" the location (2202) where the jump command was given. The next phase will store the return address into the referenced location, and will complete the jump. Watch the P- and M-registers and press SINGLE CYCLE. Both registers now address the first instruction of
Table 4-6. Examples of Program Jumps ADDRESS
4-12
CONTENTS
INSTRUCTION MEMORY
(OR DATA) REFERENCE 011 AlB Z/C
I
OCTAL CODE000000
2200 C 026200
000000 000000
2773 C 016773
I 102000
REMARKS
Program starts here (no operation).
Jump to 2200.
No operation.
No operation.
Jump to 5 + 5 subroutine at 2773.
Halt.
i~:,'1i~~~I'Y&l',~9f',r~qtrn,addl;e$,~. . ....,'
,<::,
:a:~t':~Jlg~lld>~t:,~,~:pag~,'Zero,,·'.p~tJn
,4\:,,: :
d~ildS" .. '. :,PY, ..
Model 2116C Volume One
the subroutine location 2774. Note also that the T-register indicates the number 2203, the return address, which was stored into location 2773 in the phase just completed. This value is one higher than the location jumped from, since obviously a return to location 2202 would send the pro-gram right back into the subroutine, and it would loop continuously without ever reaching 2203.
4-71. Now press the SINGLE CYCLE pushbutton seven more times. This executes the three instructions of the subroutine, which are identical to the instructions of the previous program (table 4-5). The content of location 2777, however, is now an indirect jump via location 2773.
Location 2773, remember, contains the return address.
Watch the M-register and press SINGLE CYCLE; this refer-ences location 2773. Since the next phase will be an indirect phase (L~DIRECT light is on), the content of the referenced location will be interpreted as an address. The indirect phase will complete the jump to that address.
Watch the P- and M-registers and again press SINGLE CYCLE. These registers now address location 2203 of the main program, completing the jump out of the subroutine.
Press SINGLE CYCLE to execute the HLT instruction contained in location 2203.
Section IV 4-72. The preceding three paragraphs show how sub-routines are accessed. By definition, a subroutine is a sequence of instructions designed to perform a single task, with provisions included to allow entry from any point in a program and return to the same point. The contents of locations 2773 through 2777 comprise a typical subroutine.
The single task is an addition, and the entry and return requirement is guaranteed by storing the return address in location 2773 (a function of the JSB instruction) and by including an indirect jump via this location at the end of the subroutine (programmer's responsibility).
4-73. SUMMARY.
4-74. This volume has presented a basic instruction to how the computer operates, with equal emphasis on both hardware and programming. The succeeding three volumes present specialized descriptions on each of these two aspects. Volume Two describes the processor hardware in detail, and Volume Three deals with the input/output system hardware. Volume Four provides detailed infor-mation for programming of the computer with the aid of Hewlett-Packard software.
4-13/4-14
APPENDIX A REFERENCE TABLES
Table A-I. Glossary of Terms Used in This Volume absolute - Pertaining to an address fully defined by a
mem-ory address number, or to a program which contains such addresses (as opposed to one containing symbolic addresses ).
accumulator - A register in which numbers are totaled or manipulated, or temporarily stored for transfers to and from memory or external devices.
add - Restrictive: "two's complement" addition of binary numbers. General: any arithmetic addition.
address - A number (noun) which identifies one location in memory. Also (verb), the process of directing the compu-ter to read a specified memory location (synonymous with "reference").
address modification - A programming technique of changing the address referred to by a memory reference instruction, so that each time that particular instruction is executed, it will affect a different memory location.
address word - A computer word which contains only the address of a memory location.
ALGOL - A programming language that uses familiar arith-metic conventions instead of detailed instruction-by-instruction mnemonic coding as used with the Assembler.
alter - A modification of the contents of an accumulator or extend hit; e.g., clear, complement, or increment.
analog - Pertaining to information which can have continu-ously variable values, as opposed to digital information, which can be varied in degrees no smaller than the value of the least significant digit.
'and' - A logical operation in which the resultant quantity (or signal) is true if all of the input values are true, and is false if at least- one of the input values is false.
A-register - One of the computer's two accumulator reg-isters. These registers are used for arithmetic operations and for information transfers to and from device interfaces.
arithmetic logic - The circuitry involved in manipulating the information contained in a computer's accumulators.
arithmetic operation - Restrictive: a mathematical opera-tion involving fundamental arithmetic (addiopera-tion, subtrac-tion, multiplicasubtrac-tion, division), specifically excluding logical and shifting operations. General: a.'1Y manipula-tion of numbers.
Assembler - A program for HP computers which converts a program prepared in symbolic form (Le., using defined symbols and mnemonics to represent instructions, addresses, etc.) to binary machine language.
base - The quantity of different digits used in a particular numbering system. The base in the binary numbering system is two; thus there are two digits (0 and 1). In the decimal system (base 10), there are ten digits (0 through 9).
base page - The lowest numbered page of a computer's memory. It can be directly addressed from any other page.
BASIC - An easily learned, conversational programming language using elementary mathematics.
Basic Binary Loader - A series of instructions for HP com-puters which will load, into memory, programs prepared
\vith absolute addresses, using defined input devices.
Basic Control System - A collection of programs for HP computers which direct the loading, combining, library searching, debugging, and input/output procedures for programs generated by the user.
binary - Denoting the numbering system based on the radix two. Binfu.-y digits are restricted to the values
o
and 1.binary-coded decimal - A coding method for representing each decimal digit (0-9) by specific combinations of four binary bits. For example, the 8-4-2-1 "bcd" code com-monly used with HP computers represents "I" as 0001, and "9" as 1001.
binary point - The fractional dividing point of a binary numeral; equivalent to decimal point in the decimal
binary point - The fractional dividing point of a binary numeral; equivalent to decimal point in the decimal