~ ~OVERFLOW INDICATOR
74 PCI INPUT LIST: MAXIMUM NUMBER DECLARED AT ASSEMBLY TIME
)--6.
~~$OR
STATUS RECORD,~,
X'D REGISTER 1: CHANNEL DISCONNECT REGISTER A 4 REGISTER 2: CHANNEL DISCONNECT REGISTER B 8 REGISTER 3: BRLP LINKAGE SAVE INDEX 1 C REGISTER 4: BRLP LINKAGE SAVE INDEX 2
10 REGISTER 5: BRLP LINKAGE SAVE lAC
All 14 REGISTER 6: CHANNEL DISCONNECT INDEX 1 Channels
--. ~ 18 REGISTER 7: CHANNEL DISCONNECT INDEX 2
e:-
UJ. lC REGISTER 8: CHANNEL DISCONNECT INDEX 3'0 H
0 20
C,)
Q) REGISTERS 9-16: CHANNEL WORK REGISTERS FOR
~ BRLP LINKED COMMON FUNCTIONS
U)
;:::l
..;..>
40
coj CHANNEL DISCONNECT AND COMPLETION STATUS
..;..>
UJ.
S 48
coj FILE TRANSFER STATUS
H bJ:)
0 50
H AP CALL SERVICE MESSAGE
~
5C FORMAL OUTPUT FILE IDENTIFIER
A&B 64 CHANNEL INITIALIZATION LOAD PACKET
Channels AS REQUIRED FOR RELOCATABLE LOADER
Only
74 PCI INPUT LIST: MAXIMUM NUMBER DECLARED AT ASSEMBLY TIME
FILE STATUS POINTERS: MAXIMUM NUMBER DECLARED AT ASSEMBLY TIME
16 Words Channel Status Registers
2 Words 2 Words
t
t
+
3WfdS
~ 4WfdS
2 Words Per Input
1 wtrd
Per FLB
t
7. MULTIPLEX STATUS RECORD FORMAT
WD
a
WD 1 WD 2 WD 3
Field A
B
A B C
2 4 26
D
32
E F G
2 4 26
H
11
I21
J21
K21 \ I MIl
N31
041
P 16Word Bits
a
0-1o
2-5Description
Supervisory field set and read by the MSU hardware and MSP for the purpose of establishing channel supervision as follows:
00 MSU is in control 01 Program is in control 10 Device is in control 11 MSU is in control
The content of this field specifies the current channel operation through use of one of the following operation codes.
Word Operations
0100 (STD) Store input data in D-word
0110 (STX) Store non-zero input data in D word
0101 (STT) Store input data in D word if outside limit test 1100 (LDD) Load output data from D word
1110 (LDX) Load output data from D word if input data is nonzero 1101 (LDT) Load output data from D word if input data is outside
limits Field Operations
0111 (FST) Store input data at (word) address counter location 1111 (FLD) Load output data from (word) address counter location 0011 (FSL) Same as FST but perform link operation when input
buffer is filled
1011 (FLL) Same as FLD but perform link operation when output buffer is emptied.
7. (Cont)
Field Word Bits
C
o
6-31Description
Miscellaneous/Special Operations
0000 (NOP) Specifies no operation (i.e., channel idle state)
1010 (FLL) Pseudo operation code used during FLL operation when program is in control (MFS=Ol)
I
NoteI
The value of the B field is established by the program and specifies the program to MSU instruction. This in-struction controls data transfers but may be overridden by certain device to MSU instructions (BSR, BSQ).
The contents of this field are determined by the B field value as shown below:
Word Operations STD, STX, LDD, LDX:
IMPlJED OPERAND
26
STT, LDT:
LL
131
UL 13LL -Unsigned value used as a lower limit test against input data word.
UL -Unsigned value used as the upper limit test against input data word.
Field Operations FST, FSL:
START ADDRESS 10
ADDRESS COUNTER
16
START ADDRESS - Right most 10 bits of initial address counter value.
ADDRESS COUNTER - Initially set to the beginning word (16-bit) address where input data is to be stored in core. The counter is incremented by 1 each time the MSU stores a word (except for the final input buffer word).
7. (Cont)
Field Word Bits
D 1 0-31
E 2 0-1
F 2 2-5
Description FLD, FLL:
END ADDRESS
ADDRESS 10 COUNTER 16
END ADDRESS - The right most 10 bits of the final word (16-bit) address from which data may be loaded (from this output buffer).
ADDRESS COUNTER - Initially set to the beginning (output buffer) word address from which data is to be loaded. The counter is incremented by 1 as each word is loaded from the buffer (except for the final buffer word).
Miscellaneous/Special Operations Nap:
SPARE SPARE/
18 OWl 8
SPARE~OW1 - Configuration required following the occurrence of the identification sequence prior to returning the channel to device control (MFS=10).
SPARE-SPARE - Allowed configuration once it is known that the device has accessed its OWl value and may be used by the pro-gram to retain any desired operand(s).
OWl - The OWl address of the current (this) processor.
Field is referred to as the D word or data register. This word is used to receive input data words or to provide output data words to the device during word operations. The D word is also utilized as a device to program instruction register for receiving the subroutine call parameters explicitly issued by the device in conjunction with device to MSU commands (BSR, BSQ). The D word content is also interpreted as an implicit subroutine call parameter during non-link field operations (FST, FLD).
During link operations (FSL, FLL) this field is exchanged with field A at the time the linkage occurs. Supervisory codes similar to those of the A field are contained here. For non-link operations see note.
During link operations this field is exchanged with field B at the time linkage occurs and should contain the same operation code. For non-link operations see note.
7. (Cont)
Field Word Bits
G 2 6-31
H 3
a
I 3 1-2
J 3 3-4
K 3 5-6
L 3 7
M 3 8
N 3 9-11
Description
During link operations this field i~ exchanged with field C at the time linkage occurs. The contents of this field are similar to those de-scribed for field C during link operations and pertain to the next core bin from which data is to be obtained or to which data is stored.
For non-link operations see note.
I
NoteI
Fields E, F, and G are applicable to link (FSL, FLL) and to word operations (STD, STX, STT, LDD, LDX, and LDT).
The field contents during link operations have been pre-viously described. During word operations the three fields are combined to form a subroutine call parameter word.
This bit indicates to the MSU that the output queue associated with this working channel contains an active entry.
Bit 1 - If set to 1, one or more sequential timeouts have occurred.
Bit 2 - If set to 1, working channel is active.
Denotes the class of control the device employs.
Bit 3 Bit 4
a a
1 1
a
1
a
1
Fully controlled
Semi-controlled (Message header edit can be per-formed as message setments complete.)
Spare
Semi-controlled (Message header edit must be deferred until after message is delivered to the
~ file.)
This is a counter indicating the number of output queue priorities associated with this MSR.
This indicator specifies if implicit calls are used by the associated device.
This field indicates whether the device operates in link or nonlink modes during field operations.
The operating characteristics of the associated device are specified by this field as follows:
000 - Not used 001 - Simplex load 010 - Simplex store all - Half duplex
100 - Full duplex, the associated channel is next adjacent
7. (Cont)
Field Word Bits
o
3 12-15P 3 16-31
Description
101 - Full duplex, the associated channel is previous adjacent 110 - Full duplex, the associated channel is a secondary working
channel. This state is required only when expansion to 512 TDM channels is considered
111 - Not used
This field is used by MSP to select the correct decode logic for interpretation of the subroutine call parameters associated with the MSR. Field interpretations are as follows:
0000 - Binary decode logic only.
0100 Binary or ASCII decode logic is used as determined by the most significant bit of the subroutine call parameter. If this bit is 0 (zero) binary decode logic is used.
1000 - ASCII decode logic only
1100 - Direct linkage is required. MSP performs its initial MSR error detection functions to verify the validity of a sub-routine call but MSP will not interpret the subsub-routine call parameter. In this mode MSP transfers control to a subroutine specified in the channel's subroutine directory record. The subroutine so specified is responsible for the decode of the MSR subroutine call parameters.
This field contains the core word address of the channel status record associated with this MSR.