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Moni.tor

The basic approach to memory allocation and execution control in CP-6 is as follows:

1) CP-6 uses only one 64-word Safe-Store Stack frame per domain.

2) A program may enter a domain at a higher level of privilege or priority only via a CLIMB instruction using entry descriptors controlled by the monitor.

3) Exit from a higher level domain restores the privilege and priority to those that existed prior to entry.

4) The monitor resides in its own working space.

5) Each user has a unique working space.

6) Up to three special shared processors may be

associated with any given user: an alternate shared library, a debugger, and the command processor. Each type of special shared processor resides in a separate working space.

7) Ordinary processors with shared procedure execute within the user's working space. These include most language processors such as APL, FORTRAN, BASIC, RPG-II, etc.

8) Working spaces are assigned to the following uses:

• Real addressing. Can only be referenced by monitor procedure running in privileged master mode.

• The monitor and its dynamic data segments, as seen by the monitor (all procedure on

housekeeping pages).

• Interactive command processors - procedure only.

• Debuggers - procedure only.

• Alternate shared libraries - procedure only.

• The users. Each user's working space contains all pages that are assigned to him. Some of the pages in his working space may be shared:

standard shared processor and run-time library.

16-8

User Virtual Memory Layout

The user's 512K words of virtual space is divided into the following seg:1E:nts:

1) Housekeeping JIT (HJIT)

There are three segments of interest required by the NSA hardware which are provided for in the HJIT.

These are:

1 )

2 ) 3)

LS

SSS

PS

the linkage segments for a user and all processes which may potentially be associated with a user.

the safe-store stack.

the parameter stack.

2) Job In fo rmation Tabl e (JIT)

The JIT is divided into accounting information and the page table for the user's working space.

3) Buffers

All file (and formerly COOP) buffers are allocated from a common pool within this segment.

4) Special Shared Processor Data Segments

Space for data required by a debugger, alternate shared library, or inter-active command processor is alloc ated from thi s area.

5) Data Control Block (DCB)

This contains information used by the monitor to perform I/O operations for the user.

6) The user's Instruction Segment (IS)

This area provides a 256K area for the user program (instructions and compiled data) and dynamic data. If the program requires the use of a run-time library, the user program is restricted to 224K.

1 ) Use r Da t a Se g men t s

This area can contain up to eight independent user data segments, the first two of which are used for

PL-6 automatic data and for COMMON data.

The linkage segment provided to the user provides no access to the HJIT (other than via the LSR and PSR) , the buffers, or Special Shared Processor Data Segments. The descriptors for the JIT and DCB segments allow read access only. The user has read, write and execute access via the descriptors for his Instruction Segment. The procedure portion within the Instruction Segment is protected at the page level. The descriptors for the User Data Segments allow read and write access.

Figure 16-5 shows the layout of the user's virtual space within his working space. With the exception of a fixed minimum requirement for HJIT, JIT, DCBs and buffers, the physical pages allowed to the user are demand allocated.

JIT, TSTACK, ACCOUNTING

HJIT, LINKAGE SEGMENTS, SAFESTORE STACK, PARAMETER STACK FILE (& COOP) BUFFERS

TCB, ECCB, TREE, DCBs LIBRARY AND US~R DATA

INSTRUCTION

USER PROCEDURE SEGMENT

(256K)

-,

,-DYNAMIC DATA

~

- -

~

- -

~

- - _. - - - -

~

SHARED RUN-TIME LIBRARY

AUTOMATIC DATA, COMMON DA TA, USER DA TA SEGMENTS SPECIAL SHARED PROCESSOR DATA SEGMENTS

Figure 16-5. User Virtual Memory

512K Working Spaces (not to scale)

SHARED PROCESSOR FACILITIES

The shared processor facilities of CP-6 permit the sharing of the code for compilers, assemblers, command language

processors, data base managers, debuggers, libraries, and other programs among all simultaneous users. Each user of a shared processor has its own copy only of the data and DCB portion of that program; the procedure (code) portion is shared by all users associated with the shared program.

Shared processors are not limited to those offered under CP-6. The facilities may be effectively used whenever any

program has a high probability of common usage. Service bureaus, for example, may use the mechanism for proprietary packages.

Corporate installations may use the mechanism for programs with a high use frequency.

CP-6 supports the following three types of shared processors:

• Standard shared processors

• Run-time libraries

• Special shared processors

Figure 16-6 shows the relationship of the working spaces for CP-6 users and the working spaces for the special shared

processors to real memory, thus showing the several ways that CP-6 shares program procedure.

Standard Shared Processors

Standard shared processors are created by the linker in the same manner as any user program. The processor resides in the user's working space. It may have initial data and DeBs which are unique for every user. The procedure portion of the

processor is shared by all users associated with that processor by having the procedure portion mapped into each user's working space.

To qualify as a standard shared processor, a program must meet certain requirements. Two of the more important

requirements are:

1) Shared processors are allowed only one level of overlay. There is no restriction on the number of overlays but only one of them can be associated at a time. In contrast with CP-V, data is allowed in overlays.

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