as-signed AC bit.
x X XIX X XIX X I X I X I ) ( ) (
101 1 I 2 I 31 4161 61 71 81 91101111121131141161161
Program Interrupt On Tape Reader Flag Tape Punch Flag Keyboard Input Flag
~ype.Out Flag Display Flag Clock Overflow Flag Clock Enabled Magnetic Tape Interrup t
~
~ I ~..
I .~ "I.~~
...
x'· Program Interrupt Connected
J
> ASSIGNABLE
Figure 4-5 Input-Output Status Instruction - Bit Assignment
INPUT/OUTPUT SKIP FACILITY (lOS)
The input/output skip facility enables the program to branch according to the status of an ex-terna I device. The lOS has fourteen flag inputs and is expandable to any number, five of which are used by the basic computer equipment. When an input/output skip instruction is ex-ecuted, the DS sends iot pulses to the selected device input. If the flag connected to that
input is set to 0, the next instruction in the program sequence is executed. If the flag status is 1, the next instruction is skipped. An I/O pu Ise for a skip must occur at event time 1.
The I/O skip facility is expandable through the addition of R141 modules, each of which
con-tains seven additional skip inputs. A -3 volts indicates the presence of a flag.
Commonly used
skip
instructions are:clsf 700001
rsf 700101
psf 700201
ksf 700301
tsf 700401
dsf 700501
cpsf 706401
Ipsf 706501
Issf 706601
crsf 706701
Skip if clock has overflowed.
Skip if paper tape reader buffer has a character.
Skip if paper tape punch is ready.
Skip if teleprinter keyboard buffer has a character.
Skip if teleprinter is ready to output.
Skip on display flag (I ight pen).
Skip if card punch is ready.
Skip if line printer is ready.
Skip if I ine printer spacing flag is a 1 . Skip if card reader buffer has a character.
INPUT/OUTPUT TRAP
The PDP-7 I/O trap is designed to simplify programming of sophisticated input/output routines and to provide the basic hardware necessary for a time-shared or multi-user system. The effect of the trap is to insert a program break in place of the iot instruction. Two other conditions are also trapped, an xct instruction whose subject instruction is also an xct and the hit portion of an operate class i nstruc tion.
The trap provides the PDP-7 with the basic hardware necessary to use the PDP-7 in a time-shared mode. With the use of the extend and trap modes, multi-user installations with full memory bank protection are possible. A program operating on one or more independent 8K
(or smaller) memory banks can be protected from accidental disturbance by a program operating in other memory banks. All I/O operations can be mon itored to check for use of restricted
1/0
devices or restricted memory locations. In this way, the PDP-7 can be used for real-time proc-ess control and simultaneously be available to share time with other programs in other memory banks without the threat of program interference.
The trap mode is enabled by the iton instruction (700062) with the console trap switch on. The trap mode is disabled by any program break. The iton (700062) also turns on the program in-terrupt through a microcoding of the ion instruction (700042). Since the I/O trap may not be disabled by a program without causing a program break, control over input/output rests entirely wi th the I/O interrupt routines. Other uses of the program interrupt and extend mode are con-trolled by the trap, for the extend status may not be changed and the interrupt mode may not be disabled by a program running in the trap mode.
The trap initiates a sequence of events depending on the trapped instruction.
iot An iet instruction is
trapped.
xct An xct of an xct instruction is trapped.
hit A microprogrammed hit of an operate class (740040) instruction is trapped.
A program break in place of the trapped instruction increments the program counter and stores its contents in location 0, bits 3 to 17, stores the link in bit 0, stores the extend status in bit 1, and stores the status of the trap mode in bit 2 (in this case 1). Control then
'transfers to location 2. The extend mode is enabled and the program interruptis turned off.
The next instructions are taken from the appropriate I/O routine.
PROGRAM INTERRUPT CONTROL (PIC)
The program interrupt control increases the efficiency of input/output operations by
freeing a program from the necessity of constantly monitoring program flags. When the PIC is enabled and a peripheral device becomes available, the PIC automatically interrupts the program sequence and causes a program break to occur. A subprogram beginn ing at the break location may then sense the program flags to determine which of the devices caused the interrupt. The device is then serviced and control returns to the main program. Fourteen device flags connect to the basic PIC, and more flag connections can be easily added.
The PIC may be enabled or disabled by the program. When it is disabled, program
interrupts do not occur, although device flags may be set. Interrupts for these devices occur when the PIC is re-enabled. When the computer is operating with interrupt-producing devices, the PIC is normally enabled.
The following iot instructions control the PIC:
iof 700002 Interrupt off. Disable the PIC
ion 700042 Interrupt on. Enable the PIC
Each of the input/output devices has associated with it a program flag which is set whenever the device has completed a transfer and is ready for another. When the interrupt is enabled and the device is ready, the setting of the device flag (connected to the PIC) causes a
program interrupt. The main instruction sequence is halted, the program counter, link, extend mode, and trap mode status are stored in location 0 and control transters to location 1. Thus, 9 jms 0 has effectively been executed. The interrupt is then disabled and the extend mode is turned off. The word stored in location 0 has the following format:
o 1 2 3 4 5
7 PC
17
Example
When the program interrupt is used to free the central processor between data transfers on a slow I/O device, the PDP-7 can do arithmetic or other I/O transfers whi Ie the slow device
is
in operation. The following sequence gives the lim iting usable rate at which the PDP-7 could acknowledge repetitive program interrupts from the same device. Each data transfer is 18 bits.
SERVICE TEMP
10 COUNT
.+2
END TEMP
o
/ conf'ents of PC and Link
/save AC
/transfer data from device buffer
Ito
AC/store data in memory list
/reload AC
/turn on interrupt /return to program
The routine takes 16 machine cycles, or 28.0 microseconds per loop. When operating with a slow I/O device, the PDP-7 can perform other computations or other input/output operations in between program interrupts.
If the paper tape reader (300 cps), paper tape punch (63 cps) and'teleprinter (10 cps) were all operating at full speed simultaneously through the PIC, the per cent computer time taken for I/O servicing is roughly
%1/0
time = device rates (cps) x service time (I-ls/interrupt) x 1O~
10 In this case,
0/0
I/O time=
(300+63+10) x (28) x ,1O~
10
or the time required to service the paper tape reader, punch, and teleprinter operating simul-taneously in roughly less than 1.5% of the computer time.