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2. Modeling of Planar Structures in Digital Systems

2.1. Power Planes in Electronic Packages

2.1.2. Function for Signal Transmission and EMI Mitigation

2.1.2.

Function for Signal Transmission and EMI Mitigation

The communication among different chip sets, such as processors, memories, optical modules, etc., is realized through off-chip interconnects between I/O circuitries. To ensure a sufficient signal fidelity and timing margin for proper functioning of the

8 Modeling of Planar Structures in Digital Systems

circuits, SI analysis is usually performed, which has undergone a significant development in the past few years [26]-[28]. Due to increased data rates, the signal links between drivers and receivers on PCBs or MCMs become electrically long, and thus, need to be treated as transmission lines (TLs). The signal traces in modern digital systems are almost exclusively designed as striplines or microstrips [28], for which the power planes serve as a part of the current return path and ensure a uniform TL mode across the reference plane. In addition, the power planes behave as shields preventing crosstalk between different signal layers by virtue of the skin effect; for example, a copper plane has a skin depth of about 2 micrometers (µm) at 1 GHz.

High speed signals experience many types of degradation in the passive channel such as frequency dependent conductor and dielectric losses, reflections from discontinuities and terminations, crosstalk from neighboring traces, and other noise sources. A proper characterization of these effects in the frequency domain is the premise of a reliable time domain analysis [29]. Although the electromagnetic fields of stripline and microstrip modes are distributed in a confined region near the TLs, discontinuities are usually not avoidable such as the vertical via transitions that induce and receive noises from the PDN by wave propagations in between power planes, which makes them an indispensable part of the signal net. Therefore, modeling of power planes has a major significance also to SI analysis.

The task of EMI/EMC design is to enhance the capability of preventing electronic devices from electromagnetic (EM) emissions and their immunity to external interferences [30]. The general EMI/EMC field is rather a broad discipline that covers issues in SI and PI regimes. In the context of this work, it is specific to an electronic system in a holistic perspective and deals with emission and susceptibility problems of the complete system that are otherwise not the subject of SI and PI. The EM emissions, either conducted or radiated, are regulated by government bodies, such as the Federal Communication Commission (FCC) in the United States and the International Special Committee on Radio Interference (CISPR) in the European Union [7]. Electrical designs with EMI/EMC awareness are of primary importance since no product can be released without the compliance to the standards.

In the early 90s while clock frequencies were mostly below 25 MHz, emissions came primarily from the attached cables since most wavelengths were long compared to the actual product [31]. Little emission was observed above 1 GHz, up to which the standards were specified [7]. Hence, early EMI/EMC engineering concerns mainly chocking and filtering common mode current from escaping the system. Today’s digital systems operate in the GHz range and transmit data at several Gb/s making the product itself a potentially good antenna. Expansion of the testing spectrum to 10 GHz has been considered in the EMC standardization community [31]. Measures such as suppression of emission sources, filtering, differential signaling, and careful grounding

Modeling of Planar Structures in Digital Systems 9

have been taken to improve EMC [31]-[34]. New concepts such as the electronic band gap structures have been introduced for suppression of the high frequency common mode noise [35].

Power planes can help reduce EM emissions and enhance system immunity, since they act as fences that restrain the radiations from internal traces and circuits and at the same time prevent the penetration of external noise into the system. However, radiated emissions can still be produced, especially at resonance frequencies of the power planes.

The emission source could be traced back as far as noise generated in ICs and conducted to transition vias, which further travels down to the power plane edges and radiates from there. Since suppression at the noise source is not always feasible, proper designs of power planes and decap populations become critical to the EMI/EMC engineering, which in turn emphasizes the importance of power plane modeling in this field.

An illustration of how a pair of power/ground planes interacts with the signal net, the PDN, and the radiation field is depicted in Fig. 2.3. Due to the discontinuity at the via transition, the signal return current is distributed over the inner surfaces of the power planes causing noise propagation in the form of parallel-plate modes. This noise can be injected into the PDN or radiated from the edges. Conversely, external fields can couple through the board edge or the presence of SSN from other sources can spread out through the parallel-plate modes and eventually interfere with the signal net. The pair of power/ground planes is the link among the three issues.

Signal Integrity

PWR

GND

Power Integrity EMI

Figure 2.3 Current path and electromagnetic interaction among SI, PI, and EMI in a power/ground plane pair environment. Conduction currents (solid arrows) of the signal return between power planes in the form of distributed currents (dashed arrows) that induce noise interferences with the power supply and cause radiated emissions.

10 Modeling of Planar Structures in Digital Systems