4.1 DESCRIPTION
A CPU boot is a stand-alone program that performs tests on the CPU. When the CPU boot command (CPXM or CPOM) is invoked from the IOPO console, the current program in control is replaced in IOPO.
4.2 ~t
CPXM (CRAY X-MP Computer Systems) and CPOM (CRAY-l Models A, B, C, M, and S Computer Systems) are memory diagnostics that are similar in function and must be booted into IOPO. CPU memory is tested through a series of reads and writes over the 6 Mbyte channel. The CPU, itself, does not execute any instructions.
To run CPXM, select a test pattern and enable that test by entering the CPXM EXECUTION control P command (see table 4-3). Other commands are available to alter test selections, output displays, and program
execution. Running CPXM or CPUM requires you to select the following:
• Tests to be enabled (table 4-1)
• Commands that control test displays and execution (table 4-2)
4.2.1 TEST SELECTION
Any of the nine tests described in table 4-1 can be selected.
t This manual always refers to the Central Memory test as CPXM. All references to CPXM are applicable to CPOM. Any differences between CPXM and CPUM are specifically noted in the text.
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Test
Stores the test pattern between locations 20000 a and 22000a before running the test t 1000a words for CRAY-l Sand M Series Computer Systems
tt 20 a words for CRAY-l Sand M Series Computer Systems
4.2.2 COMMANDS
CPXM control commands can be divided into two types: display and execution.
CPXM DISPLAY control commands
The CPXM display can be divided into halves: top and bottom. The top half of the screen provides general test information and is not altered
by keyboard commands. This part of the CPXM display is shown in figure 4-1 and includes the following information:
~
Test number: Number of the test being executedCV
Tes tenable: Enabled test (any and all tests can be enabled and are run in the sequence entered) is denoted by an asterisk immediately following the test number~
Total passes: Total number of passes completed for all enabled tests~
TOtal errors: TOtal number of errorsCD
Bank errors: Word errors that have accumulated for each bank MEMORY TESTG) G) ffiTOTAL
TEST 0 PASSES 000000
0 I 2 3 4 5 6* 7* 8* ERRORS 000000
BANK
~ORS
XO Xl X2 X3 X4 X5 X6 X7
OX 000000 000000 000000 000000 000000 000000 000000 000000
IX 000000 000000 000000 000000 000000 000000 000000 000000 M
-0 -1 -2 -3 -4 -5 -6 -7
000000 000000 000000 000000 000000 000000 000000 000000 000000 000001 000000 000000 000000 000000 000000 000000 000000 000000 000002 000000 000000 000000 000000 000000 000000 000000 000000 000003 000000 000000 000000 000000 000000 000000 000000 000000 000004 000000 000000 000000 000000 000000 000000 000000 000000 000005 000000 000000 000000 000000 000000 000000 000000 000000 000006 000000 000000 000000 000000 000000 000000 000000 000000 000007 000000 000000 000000 000000 000000 000000 000000 000000
Figure 4-1. CPXM memory display
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HM-1002 4-3
Test results can be displayed on the bottom half of the screen in a number of different ways. You can select either memory or bit error
information to be displayed on the bottom half of the CPXM display. When a memory display is selected, the memory address is shown in the far left column. Columns -0 through -3 display the output buffer in parcel
format, and columns -4 through -7 display the input buffer in parcel format. Ten addresses are displayed at a time. If a bit error display is selected, one of the following displays must be selected from table 4-2:
.• Total bit errors
• Bit versus bank errors
The header indicates the type of display. If the bit versus bank error display is being shown, the bank number also appears. Table 4-2 lists CPXM DISPLAY control commands and briefly describes the function of each.
Table 4-2. CPXM DISPLAY control commands
Command Description
B
B nn
D nnn
F
<
>
Display bank. Displays the total number of bit errors encountered thus far.
Bit versus bank errors. Displays bit errors according to bank origin, where nn is an octal number from 0
to 37.
Display address. Displays the output versus the input buffer for the test, where nnnn is an octal number from 0 to 1770.
Find error. Stops for an error stop condition with memory displayed. The buffer is searched for the error; the search starts at whatever address is presently being viewed. If an error is found, the address that is in error is the first address
displayed. If no error is found, the entry line is not cleared and address 0 is displayed.
Roll down. Displays the next lower-numbered bank or group of addresses
Roll up. Displays the next higher-numbered bank or group of addresses
CPXM EXECUTION control commands
CPXM EXECUTION commands not only enable and disable tests, but alter output displays and change the conditions under which tests execute as
they are executing. Any command entered at the keyboard immediately overrides any previous command at the completion of the current test.
Table 4-3 lists CPXM EXECUTION control commands and briefly describes the function of each.
Table 4-3. CPXM EXECUTION control commands
Command Description
C
N
Continue. Allows a test to continue running after being interrupted by scope, loop on error, or error stop.
Error stop mode. Executes when an error is
encountered on a check. The test stops and remains idle until it is changed.
Loop on error mode. Executes if an error is found on a check. The test continues on its current pass and performs input, output, and error checks. Loop on error mode remains active until the mode is changed.
None. Clears the scope, loop on error, and error stop command modes.
P followed by a space and one or more test
numbers enables the test associated with the number.
The following command enables tests 1, 2, and 3:
P 123
Test numbers can be entered in any sequence (P 312).
You must enter the number of each test the operator wishes enabled. To enable tests 0 through 7, enter the following:
P 01234567
t A letter appears on display right after the number of the test that is enabled. Upon encountering an error, an asterisk appears after the letter.
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Table 4-3. CPXM EXECUTION control commands (continued)
Command Description
P (continued) The P command can be entered at any time and the most recent P command takes precedence. If a P 4567
command has been entered, and while test 5 is
executing a P 123 is entered, test I begins executing immediately after the completion of test 5. The P command followed by no test numbers terminates testing after the current test has been completed.
P A Enables tests 0-8
R Restart. Clears all error and pass counters and immediately begins executing the enabled test.