The circuitry that generates, times, and distributes these control signals-usually called commands-may be as complex as the actual arithmetic circuitry, especially in a large computer. The generating, timing and ma-jor distributing circuits, taken together, are most often called the control element. This element must provide main storage element or memory in stored-program com-puters along with the numbers representing informa-tion or data.
Regardless of where the program is kept, each in-struction word is taken in a separate step (in the proper sequence) by the control element and decoded to see what major operation must be performed next. The con-trol circuitry then develops the complete set of as there are variations in adder-accumulator circuitry.
A sample set, for example, might be a sequence of single pulses meaning:
"Clear addend register"
"Accept number from storage"
"Gate addend into accumulator."
The first would be a pulse on the clear inputs of all flip-flops in the addend storage register, the second a pulse to a set of AND switches to take the number into the register, and the third a pulse to the set of gates between the register and the accumulator. Properly timed and applied, these commands make the circuitry control of input-output devices, etc.
3.6.1 Program Control
When one instruction (one program step) has been carried out, the control element must obtain the next from storage. But how does it know the location of the next instruction? Although there are several possible solutions to this, one of the easiest is to set aside a many numbers, including the input information with which the computer is to work, partial results to be held for later use, final results, and-in stored-program 107
Program Control 3.6.1
UNCLASSIFIED T.O. 31 P2-2FSQ7-2
PART 3 CH 3 computers-the program itself. There are several types
of storage devices (described in Ch 3) but it is easiest to think of the memory as a large bank of pigeonholes or mailboxes, numbered 0, 1, 2, 3, 4, etc., and each capable of holding one computer-length word. The number of each is its address. There must also be selec-tion circuitry to translate a binary address into an actual electrical connection to the correct pigeonhole so that a number can be put in or taken out.
Ordinarily, a block of the lowest-numbered ad-dresses is set aside for the program. Assuming, for ex~
ample, that addresses 0 through 99 were reserved for this purpose, any program would be stored with its first instruction in address 0, its second in address 1, its third in address 2, etc. Thus, a 67 -step program would be stored in sequence in addresses 0-66.
The instruction counter shown in figure 3-79 is cleared before the program begins. Its indication of 000 . . . 000 is sent to the storage selection circuits which quickly make a connection to address
o.
The first instruction is taken out and sent to the control element through switching circuits operated by commands issued for that purpose. The time spent in this process of obtaining the instruction is sometimes called a program cycle, or an instruction cycle.Once in the control element, the instruction is placed in a temporary storage register called either the instruction register or the operation-address register.
The control circuits issue commands to carry out the operation called for by this first instruction during what is called the execution or operation cycle. The address part of the instruction goes to the memory selection
circuits to obtain the number representing the data to be operated upon. (Or the address may call for a con-nection to one of the input or output devices to obtain or send out information.)
Toward the end of the operation being performed, a pulse is sent from the control circuits to advance the instruction counter by 1. When the operation cycle ends, control is turned over again to the instruction counter and a new instruction cycle begins. The counter now sends 000 . . . 001 to the storage selection circuits, the second instruction of the program is taken from ad-dress 1 to be sent to the operation-address register, and this instruction is then executed.
The process of bringing each instruction in se-quence from the memory, executing it, and stepping the instruction counter by 1 continues in this manner until the entire program has been performed or until a Branch instruction is encountered. This type of instruc-tion (sometimes called Transfer or Jump) makes it pos-sible to change a program or repeat parts of it, either unconditionally or under control of the results that have been computed. For example, a branch may be ordered only if the number left in the accumulator is negative. If sensing (checking its state) shows it to be positive, the branch is not made.
When a branch is to be made, the address part of the instruction is taken from the address register and loaded directly into the instruction counter, replacing whatever number was previously there. Therefore, the next instruction taken from memory is not from the next address in the sequence that was being followed, but from the address given by the Branch instruction.
ADDRESS MEMORY "'-:~---'"""i SELECTION
CIRCUITS
108
TO ALL ELEMENTS
--TO INPUT-OUTPUT DEVICES
- ..
r - - - , . - - - ---- ---1--- -1---,
I
OPERATION I ADDRESS. -I
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Figure 3-79. Instruction Control
UNCLASSIFIED
PART 3 numerical sequence of instructions is followed until an-other branch is ordered. A branch can be made to either program. Usually, the instructions are made available in sequence and, when each operation is completed, the control element senses the next instruction. This proce-dure is somewhat similar to the one described for stored-program computers, except that such useful stored- program-ming techniques as branching are difficult and expensive.
3.6.2 Operation Control
The commands necessary to carry out an instruc-tion have been described as a set of pulses (sometimes other types of signals) sent to the proper places at the proper times. Different sets are needed, of course, to carry out different operations, although certain individ-ual commands may well be used in a number of per-formed faster under asynchronous control because no fixed time intervals (cycles of the clock device) are repeti-tion frequency or bit-time interval. If pulse-type signals are used, clock pulses at bit-time intervals must be dis-tributed throughout the circuitry to provide the fre-quent reshaping and retiming of information pulses that is necessary. This holds true even if the control element itself is asynchronous in operation and does not depend upon the clock.
In parallel-mode machines, the bit-time interval is usually less vital to successful operation, so the clock obtain-ing the fastest possible operation.
Whatever the basic interval selected, the clock pulse intervals, of course, bear some relationship to real time -that is, time in the outside world. Many types of problems solved by computers involve keeping track of real time. Military weapon-control computers, for in-stance, must solve time-speed-distance problems against an incoming enemy, while computers operating various types of machines must often time the operations. So, it time-measurement in the computer.
The device which produces the clock pulses is an accurate oscillator of some sort, generally crystal-con-trolled, followed by amplifying and pulse-shaping cir-cuits.
Synchronous Control 3.6.2.1
UNCLASSIFIED T.O. 31 P2-2FSQ7-2
PART 3 CH 3 passage of time in the computer is divided into intervals
of useful length that can be called clock cycles, or machine cycles. A simple ring counter can do this and provide a different one-hot output for each step of the count.
The number of clock pulses to be counted in the clock cycle may depend upon several factors. In a serial-mode computer, the word length is quite closely related to the speed of operation since a 20-bit word, for ex-ample, requires one word-time, or 20 bit-times, to be transferred past a given point in the circuitry. Thus, one word-time might be chosen as a useful length for the clock cycle-or it might be 2, 6, or 10 word-times if one of these lengths were more convenient. A word-time is of no importance in a parallel-mode computer, since it is the same as a bit-time.
A factor that must be considered in all machines, parallel or serial, is the time required to transfer num-bers into or out of memory, called access time. This is the principal limitation on the speed of operation be-cause each number to be used in computation and each result must go through this transfer.
The access time in most computers is somewhat longer than the time needed for the shorter operations such as addition, subtraction, shifting, etc. By making the length of the clock cycle equal to the access time, the all-important transfers of numbers and the shorter operations can be performed in one clock cycle each.
When one of the longer operations such as multiplica-tion or division must be done, the required number of complete clock cycles is allowed for it.
Using an arrangement of this sort, illustrated in figure 3-80, two complete clock cycles are the mini-mum required to carry out any instruction. The first must be a program or instruction cycle, to get the in-struction out of memory and load it into the operation-address register. The -one-hot signals from the various stages of the clock ring counter are gated or otherwise switched to provide commands controlling the address selection circuits, etc., to obtain the instruction.
When this instruction cycle is nearly done, a com-mand sets a flip-flop or switch to make the next an operation cycle. Now, the circuits gating the clock ring outputs come under control of the signal representing the operation called for and the result is the set of mands necessary to perform that operation. The com-mands must be timed to allow the maximum time for each part of an operation to be completed, plus a safety factor. In binary addition, for example, time must be allotted for the propagation of a possible carry from each place, even though no carries at all may occur in some problems. If more than one operation cycle is re-quired, a simple counter keeps track of them and changes the gating for each cycle.
When the operation is almost completed, the switching is reset for another instruction cycle and the instruction counter is advanced one step, to take the next instruction from memory. In this arrangement, all program or instruction cycles are identical, but the op-eration cycles depend upon the opop-eration to be per-formed. All commands are provided by the timed pulses from the clock ring, switched through the gating cir-cuitry under control of either the operation signal or
r - - - l
CONTROL ELEMENT
I
110
OPERATION
..
MISC.
..
L _ _ _ _ _ _ _ _ _ _ _
START
CLOCK
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f - -C'::"MANDS _ _ ~STOP TRANSFER NUMBER
r •• "
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ARITHMETIC
ELEMENT
-
- NUMBERS -..
MEMORY Figure 3-80. Synchronous Control of OperationsUNCLASSIFIED
PART 3 instruc-tion, placed in the operation-address register (fig.
3-79).
3.6.2.2 Asynchronous Control
There are a number of possible variations of the asynchronous control method. The basic approach ap-pears in figure 3-81, showing how the timing of com-mands is accomplished through the use of a long delay line, instead of a clock.
The delay line consists of a number of long series paths of delay circuits (and switching circuits where necessary). Commands are tapped off between circuits at the required intervals. and start the address selection circuitry through the pro-cess of taking a number out of memory. The pulse un-necessary amount of circuitry. Actually, many opera-tions are quite similar and the parts of longer ones are straightforward and should be clear enough, except pos-sibly for the feedback loop involving the counter. If a a predetermined count is reached-meaning the pulse has circulated and been delayed this many times-the delay line produces the commands necessary for procur-ing each instruction. The timprocur-ing of each operation is being performed. An asynchronous adder, for example, can be built to allow the control pulse to run with the carries. As soon as carry propagation is completed, the control pulse is returned to the control element as a
"next instruction" command. Multiplication can be han-dled in similar fashion. In this type of arrangement, the control element tells the arithmetic element, "Start,"
and then waits for a signal to come back saying,
"Finished."
111
Fig. 3-82
OPERATION
10
X
PULSE
(COMMAND)
112
UNCLASSIFIED T.O. 31P2-2FSQ7-2
I~O 4 --... ~
I 9! 16 20.!. 21 22~
,~ _________ 4 ____________________ 2 ____________________ ~
COMMANDS
A
B
Figure 3-82. Delay Lines for Asynchronous Control
UNCLASSIFIED
PART 3 CH 3
NEXT INSTRUCTION
,.!. 0
4 24
NEXT INSTRUCTION
PART 3