For the MuPix, common signals are foreseen to be distributed via bus on the exprint. The common mode signals have less demand on bandwidth. How-ever a good signal quality is crucial. Using the test structure exprint, the feasibility of this approche has been studied on a bus trace with three signal outputs. The transmitted125 MHz clock signal can be seen in gure 31. One of the waveforms (g. 31(a)) shows a high inuence of the reection on the not terminated PCB trace ends. The other one shows a quite rectangular clock signal. This one is terminated with 50 Ω at the unconnected outputs.
Because of Kirchhof's current law the amplitude is lower with termination than without. The reection pattern can also be seen if the oscilloscope is connected to the other outputs. The problem is the length of the output branches on the PCB. The long traces on the PCB lead to a greater retar-dation between initial signal and reection.
(a) Clock on BUS1, oscilloscope connected with output 1, output 2 and 3 not terminated
(b) Clock on BUS1, oscilloscope connected with output 1, output 2 and 3 terminated with 50 Ω
Figure 31: Bus signal on the oscilloscope after transmission
55
5 Conclusion
For the purpose of connecting the MuPix chips for the Mu3e detector, a exprint for the outer pixel layers is developed. A possible solution for the power distribution is found. The solution is not as initially planed a pas-sive distribution. Instead, it is a semi-paspas-sive solution, which needs three dierent voltage sources to distribute one voltage evenly over nine MuPix chips. In order to test a rst prototype of a manufactured exprint, a test structure exprint is created. This prototype was manufactured ve times and each bonded on a separate PCB for connections to the measurement tools. Several characterizing measurements are made. From the resistance measurements, the thickness loss during the manufacturing process has been determined. The nal thickness of one aluminum layer is12.29µm±0.27µm, from a starting point of 14µm thickness. The thickness is mostly important for the resistance of the power lines but also inuences the impedance of the signal traces. The breakdown voltage measurement shows, that the HV can be applied safely with a distance of91µmto other conducting traces, because of the well isolating materials that are used. Considering that the heating tests were performed with passive radiative cooling only, the temperature measurement looks promising at 4 A with a ∆T < 13 K.
The TDR measurements show, that with the trace width of63µmand gap of 133µm±20%, the impedances are on the bottom layer at least 15 Ω too low and on the top layer at least 25 Ω too high, due to a mismatch of the single trace impedance parameters. More related to the dielectric environment is the fact that the impedance is not constant in one trace. This cannot be corrected with trace parameters, but with improved glue application.
Concerning the critical SMA connector to PCB transition, the test setup is not perfectly suited for the Eye- and Bode-Diagrams. The signal propagation seems to be highly inuenced by the impedance drop at the SMA connector and soldering to the PCB. The Bode-Diagrams show a lowpass characteris-tic with a cut-o frequency of approximately 1 GHz. The Eye-Diagrams are looking rather good, except for a decreased slew-rate. The eye height is under worst conditions261.4 mV±0.2 mVwith an amplitude of633.0 mV±0.1 mV and the eye width is about 621.7 ps±0.1 ps at 1250 Mbit/s.
The transmission line works reliably as the BERTs show (BER<5.5·10−13 95% CL). This indicates, that the SpTAB bonds are of good quality. The bonds to the PCB as well as the vias at layer transitions are nearly not no-ticeable in the TDR measurements. It seems to be a very reliable technology with a small amount of discard. Only one via on a bus trace was found to be broken (DATA5 on exprint 2 is always missing in the measurements, be-cause it has a defect on one end of the PCB, but on the exprint trace which
57
6 Outlook
The electrical layer thickness as well as the breakdown voltage are well un-derstood. But there is a need for more heating tests, especially under real conditions with an attached and running MuPix, with all power lines under load and gaseous Helium cooling.
The TDR measurements show, that for next iterations in exprint design the parameters should be changed, in order to shift the impedances towards 100 Ω. On the top layer the mismatch can be compensated by choosing a dierent trace width and another gap. Recommendations are a trace width of 98µm and a gap of 154µm. The impedance of the bottom layer can be increased by undercut the minimal structure size by 30µm.
Also tests on the now existing exprint should be done with an additional layer of polyimid on top of the top layer, simulating the support structure on this side of the exprint. Instead of a polyimid layer above the top layer, a MuPix like layer would be even more interesting. The MuPix layer on which the exprint will be bonded with the MuPix is mostly made of aluminum.
But this layer is not like the PCB a metal plane, it is more like several coats of interrupted grids of aluminum. Therefore the impedance is expected to be very dierent compared to a solid metal plane.
An improvement for the impedance could be a exprint design with three lay-ers, in which the middle layer is used as ground and stabilizes the impedance.
But it is not clear at the time of writing, if this is possible with LTU.
Better results from Eye-Diagrams and especially from the Bode-Diagram could be achieved with a dierent type of connection which reduces the impedance drop of the soldering or with a dierential probe. Even higher bit rates could be feasible in the BERT. Also a larger version with the di-mensions of the outer detector exprint would be interesting to test. More variation could be tested on a three times larger exprint and it could be tested, if the power distribution actually works as simulated.
There are also other manufacturers that should be considered. Not all of them can produce aluminum exprints but some are oering a combination of copper layers and aluminum layers. This might be interesting for the prob-lem of the low impedance on the bottom layer, because the minimal structure size for copper layers can be much smaller.
(b) bottom
(c) combined
Figure 32: Flexprint layout for inner detector layers
59
Figure 33: Shared power line designe, magnied and with full lenght
Figure 34: Flexprint-SMA adapter PCB top layer ooded
61
Figure 35: Flexprint-SMA adapter PCB third layer ooded
Figure 36: Flexprint-SMA adapter PCB fourth layer ooded
63
Figure 37: Flexprint-SMA adapter PCB bottom layer ooded
Data 3 N Flex top PCB top 48,197 0,241 0,482 1,877
Data 4 P PCB left Flex left 80,359 0,402 0,804 0,804
Data 4 P Flex left Flex top 48,557 0,243 0,486 1,289
Data 4 P Flex top PCB top 143,046 0,715 1,430 2,720
Data 4 N PCB left Flex left 80,504 0,403 0,805 0,805
Data 4 N Flex left Flex top 48,560 0,243 0,486 1,291
Data 4 N Flex top PCB top 144,740 0,724 1,447 2,738
Data 5 P PCB left Flex left 98,415 0,492 0,984 0,984
Data 5 P Flex left Flex top 48,524 0,243 0,485 1,469
Data 5 P Flex top PCB top 152,094 0,760 1,521 2,990
Data 5 N PCB left Flex left 98,487 0,492 0,985 0,985
Data 5 N Flex left Flex top 48,522 0,243 0,485 1,470
Data 5 N Flex top PCB top 152,266 0,761 1,523 2,993
Data 6 P PCB left Flex left 80,386 0,402 0,804 0,804
Data 6 P Flex left Flex top 48,478 0,242 0,485 1,289
Data 6 P Flex top PCB top 135,184 0,676 1,352 2,640
Data 6 N PCB left Flex left 79,771 0,399 0,798 0,798
Data 6 N Flex left Flex top 48,481 0,242 0,485 1,283
Data 6 N Flex top PCB top 134,440 0,672 1,344 2,627
Data 7 P PCB left Flex left 47,636 0,238 0,476 0,476
Data 7 P Flex left Flex top 174,489 0,872 1,745 2,221
Data 7 P Flex top PCB top 90,921 0,455 0,909 3,130
Data 7 N PCB left Flex left 47,721 0,239 0,477 0,477
Data 7 N Flex left Flex top 175,149 0,876 1,751 2,229
Data 7 N Flex top PCB top 90,106 0,451 0,901 3,130
Data 8 P PCB left Flex left 52,772 0,264 0,528 0,528
Data 8 P Flex left Flex top 78,558 0,393 0,786 1,313
Data 8 P Flex top PCB top 46,291 0,231 0,463 1,776
Data 8 N PCB left Flex left 55,677 0,278 0,557 0,557
Data 8 N Flex left Flex top 78,420 0,392 0,784 1,341
Data 8 N Flex top PCB top 46,345 0,232 0,463 1,804
Data 9 P PCB left Flex left 77,239 0,386 0,772 0,772
Data 9 P Flex left Flex top 78,982 0,395 0,790 1,562
Data 9 P Flex top PCB top 65,175 0,326 0,652 2,214
Data 9 N PCB left Flex left 78,820 0,394 0,788 0,788
Data 9 N Flex left Flex top 78,945 0,395 0,789 1,578
Data 9 N Flex top PCB top 63,795 0,319 0,638 2,216
Data 10 P PCB left Flex left 63,555 0,318 0,636 0,636
Data 10 P Flex left Flex top 79,280 0,396 0,793 1,428
Data 10 P Flex top PCB top 43,250 0,216 0,432 1,861
Data 10 N PCB left Flex left 65,159 0,326 0,652 0,652
Data 10 N Flex left Flex top 79,277 0,396 0,793 1,444
Data 10 N Flex top PCB top 41,796 0,209 0,418 1,862
Table 9: Propagation times and time domains
65
(a) DATA1
(b) DATA7
Figure 38: TDR examples of rising impedance over exprint length
FlexPowerlinecurrenterrcurrentvoltageerrvoltagepowererrpow AAmVmVmWmW 110,499960,0000133,6100,01016,8070,002 120,500000,0000127,0100,01013,5050,003 130,500010,0000150,5900,01025,3040,003 140,500000,0000131,9400,01015,9710,003 150,499990,0000163,1600,01031,5800,010 160,500010,0000142,0700,01021,0350,003 210,499910,0000133,2400,01016,6220,003 220,499980,0000126,6700,01013,3270,003 230,500000,0000149,8500,01024,9200,002 240,500020,0000131,5140,00415,7580,003 250,500020,0000162,9830,00331,4920,002 260,500020,0000141,9400,01020,9750,003 310,500030,0000133,3700,01016,6820,003 320,500010,0000126,8400,01013,4100,010 330,500020,0000149,9900,01025,0050,003 340,500030,0000131,6300,01015,8100,010 350,500020,0000162,9700,01031,4860,003 360,500010,0000141,8890,00220,9430,003 410,500050,0000133,5570,00316,7780,003 420,500010,0000127,0020,00313,5020,003 430,500010,0000149,7890,00324,8920,003 440,500030,0000131,6390,00315,8230,003 450,500020,0000163,0210,00331,5090,003 460,500040,0000141,8880,00320,9420,003 510,500030,0000133,7990,00316,8950,003 520,500010,0000127,0990,00313,5420,003 530,500030,0000150,3190,00325,1670,003 540,500000,0000131,9140,00315,9620,003 550,500010,0000163,3040,00331,6450,003 560,500000,0000142,0300,00321,0170,003
Table 10: Resistance measurements
67
(a) DATA2 only
(b) DATA2 measured with disturbing signal from DATA1, DATA3 and BUS2
Figure 39: Jitter and noise breakdown
10 Outer detector layer exprint layout . . . 22
29 Sketch of the BERT transmission line for one dierential trace 50 30 Eye-Diagrams at higher bit rates . . . 52
31 Bus signal on the oscilloscope after transmission . . . 54
32 Flexprint layout for inner detector layers . . . 58
33 Shared power line designe, magnied and with full lenght . . . 59
34 Flexprint-SMA adapter PCB top layer ooded . . . 60
35 Flexprint-SMA adapter PCB third layer ooded . . . 61
36 Flexprint-SMA adapter PCB fourth layer ooded . . . 62
37 Flexprint-SMA adapter PCB bottom layer ooded . . . 63
38 TDR examples of rising impedance over exprint length . . . . 65
69 List of Tables
39 Jitter and noise breakdown . . . 67
List of Tables
1 VSSA results from LTspice IV simulation for shared power trace schematic (g. 6(a)) . . . 16 2 VSSA results from LTspice IV simulation for sliced power trace
schematic (g. 8(b)). . . 19 3 VDD results from LTspice IV simulation for sliced power trace
schematic (g. 8(c)) . . . 19 4 Design rule summary for the outer detector layer exprint . . 21 5 Specication overview of data traces on the structure exprint 26 6 Thickness determination from the linear ts in g. 19. . . 32 7 Theoretical impedances . . . 43 8 Bit error rates from dierent trace combinations, BER
depen-dent on bit rate and measurement time . . . 50 9 Propagation times and time domains . . . 64 10 Resistance measurements . . . 66
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Moreover, I would like to thank particularly:
•Dr. Dirk Wiedner and Dr. Frank Meier Aeschbacher for their pedagogical guidance and asking the right questions at the right time.
• Lennart Huth and Heiko Augustin for their constructive and clever ideas.
• Jan Hammerich for helping me out with the measurement tools and the laboratories inventory.
• And especially my supervisor Sebastian Dittmeier for being patient and oering at anytime and in any situation his help.
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Erklärung
Ich versichere, dass ich diese Arbeit selbstständig verfasst und keine anderen als die angegebenen Quellen und Hilfsmittel benutzt habe.
Heidelberg, den ...,