AUG CARRY
BC STEPPING INPUT
C1
co
Fig. 24
There may be as many as three inputs to a binary counter. It resembles a flip-flop in that it has two stable conditions.
However, it differs from the flip-flop in its basic logical significance. A binary counter always changes state when it is pulsed on the main input(s). The flip-flop is put into either state without specific knowledge of its previous state, while the binary counter cannot be so controlled by its main input.
Each binary counter can be cleared to zero, or to one, if desired, by special inputs, CO and Cl. A single binary counter may be considered as an oddness-eveness indicator.
For example, if the binary counter (BC) has been cleared to zero initially, then, any time after aneven number of pulses has been applied to the input, the BC will read 0; conversely, an odd number of pulses will find the BC reading one.
More easily recognized binary counting occurs when a group of binary counters are connected as a mUlti-state counter as in figure 25.
o
Fi g. 2'5
o o
CLEAR TO ZERO
INPUT
Such an array has 32 different stable states as follows:
o
0o
0o
0o
0o
01 1 1 1 1 1 1 1 1 1 1 1 1 1
Each time anyone counter of the group is pulsed and it passes from one to zero, the one output delivers a pulse to the input of the next higher stage of the counter. When all the stages have reached one (which in the case of five count-ers equals decimal 31) all stages produce carry pulses which turn every stage back to zero. At any time after a string of pulses has been applied to the LSD counter input, the 5-stage counter illustrated, will indicate how many pulses up to 31 have been applied. Every time a multiple of 32 pulses occurs the counter clears to zero and starts counting again.
By increasing the number of stages such a binary count-er could count up to any powcount-er of two whcount-ere the numbcount-er of stages would equal the power. Thus, a 5-stage counter has 25 or 32 stable states; an 8-stage counter would have 28 or 256 stable states.
The method by which such a counter is read or inter-preted depends upon how the information is to be used.
Various uses for binary counters will be given later and the different methods for reading them will be discussed when appropriate.
REGISTERS
The most elementary static binary memory has already been described as the flip-flop. For remembering an entire word. another type of binary memory can be employed. In general. such a device is called a register. The register is simply a combination of gates and delays hooked in a loop s u c h t hat an y p u I see n t e r in g the I 00 p 0 r reg i s t ere x per i en c e s exactly one word time of delay in one complete circulation.
One additional element is introduced at this point call-ed a pulse former (PFR). The pulse former is what adds the energy of circulation to the system. Passage of pulses through any of the elements. such as gates or delays. causes deterioration of the pulses. The proper shape and timing of pulses is dependent upon the PFR's which are introduced at many points throughout the computer. They serve no logical purpose. in general. but do lift the block diagrams out of the realm of purely imaginary operation into the realm of practicality.
The pulse formers are controlled by timing pulses from the master oscillator. In the small computer we are consid-ering these occur at the rate of one million per second. or at intervals of one microsecond. These timing pulses are sufficient to insure that information pulses reshaped by the pulse formers will be exactly of one microsecond duration.
A pulse former will be shown on the diagram by the following symbols:
.~
tB
PFR
A Fig. 26
A pulse former will delay the transmission of pulses for one pulse time. Timewise, it has the effect of a one pulse delay. If in figure 26 a pulse is fed into the pulse former during time P2' it will not control the vol tage at point B until time P3.
Gt
Fig. 27
A typical register for a binary computer is shown in such ashere illustrated, requires that the previous contents of the register be cleared out before the new word enters.
NoW, if the two gates are operated together, clearing of the first pulse position of the previous word begins just as the first pulse of new word passes through input gate G 3.
Furthermore, G3 should close just after the last pulse of the incoming word. But at the same time, the last pulse of the old word in the register has just reached the clear gate.
Since the first and last pulses of the information portion a word in a register are separated by the space be-tween words (SBW), there are several pulse times available d uri n g w hi c h to c los e the in put gat e an d 0 pen the c I ear gat e . The clear gate, G2, must certainly open before the first pulse of the new word reaches it. Due to the precise timing th roughout the compu ter, th e time reI at ion bet ween the 0 I d word in the register and the new word entering a register is identical.
The timewise separation of Gl and G2 by the D2 delay will be explained later.
SHIFTING
In the ordinary desk calculator, the operation known as shifting is accomplished by moving the'accumulator dials on the carriage with respect to the input keyboard. The shift-ing operation is required in multiplication and division.
Effectively, shifting is simply multiplying a quantity by a power of the base of the number system. Thus a decimal cal-culator multiplies by powers of 10 (positive and negative) as the carriage is moved to the left or right.
In a binary device a shift of one digit position to the right is effectively multiplying the quantity by 1/2 or 2- 1• Shifting left two places is multiplication by 4 or 22. The
method of shifting in a dynamic circulating register is ac-complished by adding or removing unit pulse times of delay.
Thus in figure 28, shifting circuits have been added to a register. The normal path of circulation is through gate
G5.
PFR PFR
HSB Fig. 28
DISTRIBUTION AND COLLECTION
The flip-flop and binary counter were shown to be a form of static binary memory. The circulating register is a form of dynamic memory. If both types of devices exist within the computer, there must be some means of converting from dynamic to static storage and from static to dynamic storage. The former process is called distribution and the latter is called collection.
Figure 29 shows the schematic arrangement for distribu-tion. First, there is an electrical delay line shown on the left. There is a delay of one pulse time between each tap.
The connection from the delay line to the gates are called taps.
W hen a seq u e n ceo f p u Is e s en t e r s th e del ay lin e , the
c
B
A
INPUT
s
FIG. 29
I----~ 0
""----I---~O ' - - - '
1 - - - -. . 0
'"----FIG.30
If the p 10 position of a word is stored in M4, Pg in M3 , Ps in M2 and P7 in M1, we can convert this to a sequence of pulses by making S
=
P7. Then G1 is sampled at P7 and will produce a pulse if the state of M1 indicates a binary one. G2 is sampled at Ps' G3 at Pg and G4 at P10.Only one output of each memory element is used to alert its gate. Hence, a gate will have an output only if the "1"
output line of its memory element is excited, even though all gates are sampled by signal S.