GENERAL DESCRIPTION
The general fonnat of the SEL 810B Assembly symbolic instruction input (source input) consists of five major fields. These fields are the Location, Operation, Address and Comments::" Identification fields. Figure 3-1 shows a sample coding format that may be used for writing source programs in
symbolic assembly language. The following para-graphs describe the coding format.
I
73 I IDENTIFICATION I I I I I I I 80 II
LOC. OPER. ADDRESS. INDEX
1 6 11 25 7
•
BIN ARY-OCTAL co N - II
* VERS ION AND TYPEOUIT I ."
RE L I
I ...
N A MoE BINOCT B I
I
B DAC • * I
'"
TAB I
L I X I
I '"
DATA - 6
CLA I
I
FLL 1 1
I BRU * + 2
LOOP FLL • 3
AMA - , 2 6 0 ADD AS C I I L S L 8
I AOP 1 . W.
I I X S
I
BRU LOOP
I
BRU* B I
I .. , END
I _1 I I
I
9S118A. 31
Figure 3-1. Example of Assembler Coding LOCATION FIELD
The Location field (columns 1 - 4, in figure 3-1) may consist of a symbolic label for the instruction
line when it becomes necessary to refer to this location elsewhere in the program. The symbolic label consists of 1 to 4 characters; the first charac-ter must be a letcharac-ter and the remaining characcharac-ters may be either letters or digits. If no reference to the instruction line is necessary, the Location field may be left blank.
OPERATION FIELD
The Operation field (columns 6 - 9, in figure 3-1) consists of a mnemonic computer instruction or pseudo-operation. A list of mnemonic instructions and pseudo-operations is given in tables 3-2 and 3-4.
Mnemonic computer instructions consist of 3letters.
The mnemonic instruction must be "left - justified"
in the Operation field, i. e., written in columns 6, 7 and 8. If the instruction addre s s is to be made indirect, the 3-letter mnemonic is followed by an asterisk (':') written in column 9.
Pseudo-operations consist of 3 or 4 letters and represent either data definition or instructions to the assembly program.
ADDRESS FIELD (VARIABLE FIELD)
Memory reference instructions use the variable field to define the ope rand addre s s which maybe followed by a comma and a one (, 1), to signify indexing. Some other instructions, such as shift and I/O machine operations and some pseudo-operations, have special formats for the variable...
field which are defined in tables 3-1. 3-2, 3-3 and 3-4. If no address field definition is required the addre s s field is left blank.
Operand Address Formats
No Address. The address field may be left blank if no operand address is required.
Symbolic Address. Consists of 1 to 4 characters starting ~ith a lette r.
External Symbolic Address. An external symbolic address consists of a dollar sign ($) followed by 1 to 6 characters, the first of which is a letter.
This external variable is presumed not defined
within the program in which it is contained but pre-sumed decimal. Octal addresses are prec~ded
by an apostrophe (').
Current Location. The location of this instruction is used as the instruction's address if a single
Literal Address. Literal addresses allow a con-stant to be defined, as signed to a memory cell and that assignment location used as the address for this instruction. All constants defined in literal addresses will optimize storage so that all identical constants (regardless of their format) will be assigned only once. A literal address
con-sists of an .equal sign (=) followed by the constant.
Any decimal integer, octal number, single asterisk (current location), previously defined symbolic name or combination of these formats joined by a + or - may follow the equal sign in a literal address.
Location To Be Filled. A double asterisk (**) indicates the address portion of this instruction is to be filled in by the object program at run time and is identical to an absolute address of 000.
The assembly program presumes the computer has a l5-bit address and, therefore, does not attempt to reduce the argument addre s s to a 9 - bit address. When the resulting object tape is loaded by the loader into memory starting at a location deterITlined by the operator, these l5-bit addresses are modified as follows: SYITlbolic Address and Index
Literal Decimal Constant Literal Octal Constant
Any line which has an asterisk (,~) in the first character position of that line will be considered a line of comments. (See line 1 in figure 3-1. ) Because of width limitations on the typewriter ,.
comments appearing after colurrm 50 will be output only on the line printer.
IDENTIFICATION FIELD
This field is not checked and is considered as part of the comments. It is provided as a programmers aid. For example, it may be used to identify a card
or cards in a card deck or for sequencing the card deck. It is located in columns 73 thru 80.
MNEMONIC COMPUTER INSTRUCTIONS
The computer instructions listed in table 3-2 will be accepted by the SEL 8l0B assembly program.
All permissible fields are shown in the Allowable Fields column with all required fields underlined.
Any of the described symbolic notations in this manual may be used in the variable fields, pro-viding they are defined.
Absolute notations for the variable fields are shown in table 3- 3.
Table 3-2. SEL 8l0B Mnemonic Instructions MNEMONIC
Instruction Allowable Fields Description
AMA AMA'~ Addr, 1 Add Memory to A-Accumulator
AMB AMB* Addr, 1 Add Memory to B-Accumulator
SMA SMA~' Addr, 1 Subtract Memory from A-Accumulator
MPY MPY~' Addr, 1 Multiply B-Accumulator times Memory
DIV DIV* Addr, 1 Divide A and B_Accumulator by Memory
RNA RNA RoundA-Accumulator by MSB in B-Accumulator
OVS OVS Overflow Set
LAA LAA* Addr, 1 Load A-Accumulator from Memory
LBA LBA':' Addr, 1 Load B-Accumulator from Memory
STA STA* Addr, 1 Store Memory from A-Accumulator
STB STB* Addr, 1 Store Memory from B-Accumulator
LIX LIX Load Index
DATA (Immediate Mode)
LIX'~ or
DAC* Addr, 1 (Address Mode)
STX STX Store Index
DATA (Immediate Mode)
STX* or
DAC~' Addr, 1 (Address Mode)
LCS LCS Load Control Switches in A-Accumulator
BRU BRU* Addr, 1 Unconditional Branch
SPB SPB'~ Addr, 1 Store Place and Branch
MNEMONIC Instruction
SNS IMS CMA
IBS SAZ SAP SAN SOF SAS
SNO LOB
SXB IXS ABA OBA NEG ASC CNS CLA TAB lAB
CSB
TBA TAX
Table 3-2. SEL 810B Mnemonic Instructions (Cont'd) Allowable Fields
SNS Switch no.
CMA*Addr, 1
IBS SAZ SAP SAN SOF SAS
SNO LOB
EAC Addr, 1 SXB
IXS ABA OBA NEG ASC CNS CLA TAB lAB
CSB
TBA TAX
De scription Skip if Console Switch Not Set Increment Memory and Skip
Compare Memory and A-Accumulator (3 way) n+1(-), n+2 (0), n+3 (+)
Increment B-Accumulator (Index) and Skip Skip if A-Accumulator is Zero
Skip if A-Accumu'lator is Positive Skip if A-Accumulator is Neg&.tive Skip NO Overflow
Skip on A-Accumulator sign (3 way) n+1 (-), n+2 (0), n+3 (+)
Skip if A-Accumulator is not Normalized Long Branch
Skip if Index Pointer is Set to B-Accumulator Increment Index and Skip if Positive
AND A-Accumulator and B-Accumulator OR A-Accumulator and B-Accumulator Negate A-Accumulator
Complement A-Accumulator Sign Convert Number System
Clear A-Accumulator
Transfer A-Accumulator to B-Accumulator Interchange A-Accumulator and B-Accumulator Transfer B-Accumulator Sign to Carry and Clear B-Accumulator Sign to Positive
Transfer B-Accumulator to A-Accumulator Transfer A-Accumulator to Hardware Index Register
MNEMONIC Instruction
TXA
TAP TPA TBV
TVB
XPX
XPB RSA LSA FRA FLA RSL FRL LSL FLL HLT NOP TOI PIE
PID
AOP AlP
Table 3-2. SEL BlOB Mnemonic Instructions (Cont'd)
Allowable Fields TXA
TAP TPA TBV
TVB
XPX
XPB
RSA
- - -
Count LSA Count -FRA- - -
Count FLA Count-RSL
- - -
Count FRL Count-LSL
- - -
Count FLL Count -HLTNOP TOI PIE
DATA GrouE & Level
PIE~'
DAC':' Addr, 1 -PID
DATA Group & Level PID':'
DAC~' Addr, 1
-AOP Unit, Wait AlP Unit, Wait,
Merge
Description
Transfer Index Register to A-Accumula-tor
Transfer B-Accumulator to Protect Register Transfer Protect Register to B-Accurnulator Transfer B-Accumulator to Variable Base Register (VBR)
Transfer Variable Base Register (VBR) to B-Accumulator
Set Index Pointer to X Index Regis-ter
Set Index Pointer to B-Accumulator Right Shift A-Accumulator
Left Shift A-Accumulator
Right Shift A-Accumulator and B-Accumulator Left Shift A-Accumulator and B-Accumulator Right Logical Shift A-Accumulator
Logical Rotate A-Accumulator and B-Accumula-tor
Left Logical Shift A-Accumulator Log;ical Left Shift A-Accumulator and B-Accumulator
Halt
No Ope ration Turn Off Interrupt Priority Interrupt Enable
Priority Interrupt Disable
A- Accumulator Out to Unit (n) (Without wait, skip on ready)
A-Accumulator Input from Unit (n) (Without wait, skip on ready)
Table 3-2. SEL 8l0B Mnemonic Instructions (Cont'd) MNEMONIC
Instruction Allowable Field
MOP MOP Unit, Wait
DATA OR
MOP* Unit, Wait, MAP DAC* Addr, 1
MIP MIP Unit, Wait,
DATA OR
MIP~' Unit, Wait, MAP DAC':' Addr, 1
CEU CEU Unit, Wait,
DATA OR CEU* Unit, Wait
MAP DAC* Addr, 1
TEU TEU Unit,
DATA OR TEU* Unit, MAP DAC* Addr, 1