• Keine Ergebnisse gefunden

Application of a standard process sequence to multicrystalline silicon

The features of the cell structure for a high-efficiency device on monocrystalline silicon are well known (see previous section). When trying to produce a high-efficiency solar cell on multicrystalline silicon, one of the first ideas is to apply the processes described in the previous section. This cannot work for the pyramid texture since every grain has a different crystal orientation and thus anisotropic etching methods will not work. A very effective texturing method for

multicrystalline using plasma etching was developed by the author and is described in section 4.3.

With the exception of texturing, all other processes in principle are applicable on multicrystalline silicon. Thus a batch of solar cells with a standard high-efficiency process and a similar solar cell structure as in Fig. 2-10 with many high-temperature oxidations was produced. The minority carrier lifetime of consecutive multicrystalline silicon wafers was monitored on standard wafers of ρ≈ 1.5 Ω cm produced by the company ScanWafer. Starting with seven lifetime monitoring wafers after each high-temperature process one wafer was removed from the batch and all diffused or oxidised layers were etched away. After surface passivation with silicon nitride quasi-steady state photoconductance (QssPC, see Appendix A2) was measured on four spots on every wafer and arithmetically averaged. The results are shown in Fig. 2-11. The minority carrier lifetime which started on a high average level of τ≈ 50 µs (which corresponds to a diffusion length of Le≈ 380 µm), was strongly reduced by an oxidation at 1050 °C for two hours.

Fig. 2-11: Minority carrier bulk lifetime of multicrystalline silicon wafers in a standard high-temperature process sequence designed for monocrystalline silicon. All diffused or oxidised layers were etched away and the surfaces were passivated with silicon nitride. The measurements were taken on four spots on every wafer with the QssPC method at

n = 11015 cm-3 and arithmetically averaged. Oxidation at 1050 °C led to a severe degradation which was only partly recovered by the emitter diffusion.

During further high-temperature processes, the material did not recover, with the exception of the emitter diffusion. This phosphorus diffusion at 790 °C improved the carrier lifetime, but not to the initial value. The last oxidation for emitter drive-in and surface passivation agadrive-in degraded the material to very low values.

Additionally multicrystalline wafers were processed which were only exposed to one high-temperature process or a short sequence. The results are displayed in Fig.

2-12.

Fig. 2-12: Minority carrier bulk lifetime of multicrystalline silicon wafers after different high-temperature processes and short process sequences. All diffused or oxidised layers were etched away and the surfaces were passivated by silicon nitride. The measurements were taken on four spots on every wafer with the QssPC method at n = 11015 cm-3 and arithmetically averaged.

Every single high-temperature process except for the emitter diffusion led to a significant lifetime degradation in multicrystalline silicon. When a diffused layer was present during drive-in oxidation, the degradation was reduced.

Also every single high-temperature oxidation is harmful and significantly decreases the material quality. When diffused layers are present on the wafer during drive-in oxidations, the degradation is reduced, probably due to in-situ gettering.

The observed minority carrier lifetime degradation by high-temperature processes was reported in literature by several authors [20-24]. However, one exceptional result was presented by Zhao et al. [25,26] who applied the PERL

process sequence (compare section 2.4) with several oxidations at temperatures of about 1050 °C and an adjusted isotropically etched front surface on very clean material from the company Eurosolare. On an area of 1 cm2 an efficiency of η = 19.8 % was published. It was reported by Green [27] that after completed processing the material consisted of regions of very good and very poor quality areas and that scatter of cell performance was large. Similar results were observed by the author of this thesis with locally resolved lifetime measurements taken with the Carrier Density Imaging technique (CDI, see Appendix A4) as shown in Fig.

2-13. The image on the left-hand exhibits many areas of high material quality. A neighbouring wafer with the same crystal structure was oxidised for one hour at 1050 °C. It revealed a severe degradation in most areas, only some small regions could maintain their high minority carrier lifetimes. This explains why it is possible to produce solar cells with high efficiencies on small areas with the standard high-temperature processing. But in principle the material quality is severely degraded.

s neues Neue

.03:

den bei den Format m Zeilenende nicht getre

s neues Neue

03:

den bei den Format m Zeilenende nicht getr

Fig. 2-13: Bulk lifetime of multicrystalline silicon wafers passivated with silicon nitride. The starting material (left-hand) has many areas of high lifetime and some medium quality areas.

Even one oxidation for one hour at 1050 °C led to severe degradation on a neighbouring wafer in most regions, only some grains could preserve a high minority carrier lifetime (right-hand).

Solar cells were produced with nearly the same process sequence as described in Fig. 2-11 (using an additional n++-diffusion underneath the front contacts). The results corresponded well to the lifetime measurements: The highest efficiency on a 1.5 Ω cm multicrystalline wafer of 4 cm2 size was only 15.6 %. In a previous attempt 16.2 % had been achieved with a full process sequence for a PERL-cell by Knobloch [28]. These low efficiencies are explained by the strongly reduced material quality of the multicrystalline silicon after the oxidations at 1050 °C.

Therefore this high-temperature route was not followed any further.